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A3931KJP-T PDF预览

A3931KJP-T

更新时间: 2024-01-21 11:34:03
品牌 Logo 应用领域
急速微 - ALLEGRO 驱动器运动控制电子器件信号电路电动机控制控制器
页数 文件大小 规格书
21页 450K
描述
Automotive 3-Phase BLDC Controller and MOSFET Driver

A3931KJP-T 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:QFP包装说明:HLFQFP, QFP48,.35SQ,20
针数:48Reach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.35其他特性:ALSO REQUIRES A 7V TO 45V SUPPLY
模拟集成电路 - 其他类型:BRUSHLESS DC MOTOR CONTROLLERJESD-30 代码:S-PQFP-G48
JESD-609代码:e3长度:7 mm
湿度敏感等级:2功能数量:1
端子数量:48最高工作温度:135 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:HLFQFP封装等效代码:QFP48,.35SQ,20
封装形状:SQUARE封装形式:FLATPACK, HEAT SINK/SLUG, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):260电源:7/45 V
认证状态:Not Qualified座面最大高度:1.6 mm
子类别:Motion Control Electronics最大供电电流 (Isup):14 mA
最大供电电压 (Vsup):50 V最小供电电压 (Vsup):5.5 V
标称供电电压 (Vsup):14 V表面贴装:YES
温度等级:AUTOMOTIVE端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:40
宽度:7 mmBase Number Matches:1

A3931KJP-T 数据手册

 浏览型号A3931KJP-T的Datasheet PDF文件第2页浏览型号A3931KJP-T的Datasheet PDF文件第3页浏览型号A3931KJP-T的Datasheet PDF文件第4页浏览型号A3931KJP-T的Datasheet PDF文件第5页浏览型号A3931KJP-T的Datasheet PDF文件第6页浏览型号A3931KJP-T的Datasheet PDF文件第7页 
A3930 and A3931  
Automotive 3-Phase BLDC Controller and MOSFET Driver  
Features and Benefits  
Description  
High current 3-phase gate drive for N-channel MOSFETs  
Synchronous rectification  
Cross-conduction protection  
Charge pump and top-off charge pump for 100% PWM  
Integrated commutation decoder logic  
Operation over 5.5 to 50 V supply voltage range  
Extensive diagnostics output  
TheA3930andA3931are3-phasebrushlessdc(BLDC)motor  
controllers for use with N-channel external power MOSFETs.  
They incorporate much of the circuitry required to design a  
cost effective three-phase motor drive system, and have been  
specifically designed for automotive applications.  
A key automotive requirement is functionality over a wide  
input supply range. A unique charge pump regulator provides  
adequate (>10V) gate drive for battery voltages down to 7V,  
and allows the device to operate with a reduced gate drive at  
battery voltages down to 5.5V. Power dissipation in the charge  
pumpisminimizedbyswitchingfromavoltagedoublingmode  
at low supply voltage to a dropout mode at the nominal running  
voltage of 14V.  
Provides +5 V Hall sensor power  
Low-current sleep mode  
A bootstrap capacitor is used to provide the above-battery  
supply voltage required for N-channel MOSFETs.An internal  
charge pump for the high-side drive allows for dc (100% duty  
cycle) operation.  
Package: 48 Lead LQFP with exposed  
thermal pad (suffix JP)  
Internal fixed-frequency PWM current control circuitry can  
be used to regulate the maximum load current. The peak  
load current limit is set by the selection of an input reference  
voltage and external sensing resistor. The PWM frequency is  
set by a user-selected external RC timing network. For added  
flexibility, the PWM input can be used to provide speed and  
Continued on the next page…  
Typical Application  
3930-DS  
Preliminary Data Sheet Subject to Change Without Notice April 6, 2006  

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