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ALD110800SCL

更新时间: 2024-02-24 23:04:56
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描述
QUAD/DUAL N-CHANNEL ZERO THRESHOLD™ EPAD® PRECISION MATCHED PAIR MOSFET ARRAY

ALD110800SCL 技术参数

是否无铅:含铅生命周期:Contact Manufacturer
包装说明:,Reach Compliance Code:unknown
风险等级:5.58Is Samacsys:N
Base Number Matches:1

ALD110800SCL 数据手册

 浏览型号ALD110800SCL的Datasheet PDF文件第2页浏览型号ALD110800SCL的Datasheet PDF文件第3页浏览型号ALD110800SCL的Datasheet PDF文件第4页浏览型号ALD110800SCL的Datasheet PDF文件第5页浏览型号ALD110800SCL的Datasheet PDF文件第6页浏览型号ALD110800SCL的Datasheet PDF文件第7页 
TM  
A
L
D
DVANCED  
INEAR  
EVICES, INC.  
®
e
EPAD  
A
ALD110800/ALD110800A/ALD110900/ALD110900A  
QUAD/DUAL N-CHANNEL ZERO THRESHOLD™ EPAD®  
V
= +0.00V  
GS(th)  
PRECISION MATCHED PAIR MOSFET ARRAY  
GENERAL DESCRIPTION  
FEATURES  
ALD110800A/ALD110800/ALD110900A/ALD110900 are high precision  
monolithic quad/dual N-Channel MOSFETs matched at the factory using  
ALD’s proven EPAD CMOS technology. These devices are members of  
• Precision zero threshold voltage mode  
• Nominal R @V =0.00V of 104KΩ  
• Matched MOSFET to MOSFET characteristics  
• Tight lot to lot parametric control  
DS(ON)  
GS  
®
the EPAD Matched Pair MOSFET Family.  
• V  
match (V ) to 2mV and 10mV max.  
GS(th)  
OS  
Intended for low voltage small signal applications, the ALD110800/  
ALD110900 features Zero-Thresholdvoltage, which reduces or elimi-  
nates input to output voltage level shift, including circuits where the signal  
is referenced to GND or V+. This feature greatly reduces output signal  
voltage level shift and enhances signal operating range, especially for  
very low operating voltage environments. With these zero threshold de-  
vices, an analog circuit with multiple stages can be constructed to oper-  
ate at extremely low supply or bias voltage levels. For example, an input  
amplifier stage operating at 0.2V supply voltage has been demonstrated.  
• Positive, zero, and negative V  
• Low input capacitance  
• Low input/output leakage currents  
APPLICATIONS  
tempco  
GS(th)  
• Energy harvesting circuits  
• Very low voltage analog and digital circuits  
• Zero power fail safe circuits  
• Backup battery circuits & power failure detector  
• Low level voltage clamp & zero crossing detector  
• Source followers and buffers  
• Precision current mirrors and current sources  
• Capacitives probes and sensor interfaces  
• Charge detectors and charge integrators  
• Differential amplifier input stage  
• High side switches  
ALD110800A/ALD110800/ALD110900A/ALD110900 matched pair  
MOSFETs are designed for exceptional device electrical characteristics  
matching with the threshold voltage set precisely at +0.00V +0.01V, fea-  
turing a typical offset voltage of only +0.001V (1mV). As these devices  
are on the same monolithic chip, they also exhibit excellent tempco track-  
ing characteristics. They are versatile as design components for a broad  
range of analog applications such as basic building blocks for current  
sources, differential amplifier input stages, transmission gates, and multi-  
plexer applications.  
• Peak detectors and level shifters  
• Sample and Hold  
• Current multipliers  
• Analog switches / multiplexers  
• Voltage comparators and level shifters  
Besides matched pair electrical characteristics, each individual MOSFET  
also exhibits well controlled parameters, enabling the user to depend on  
tight design limits. Even units from different batches and different date  
of manufacture have correspondingly well matched characteristics.  
PIN CONFIGURATIONS  
ALD110800  
These devices are built for minimum offset voltage and differential ther-  
mal response, and they are designed for switching and amplifying appli-  
cations in +0.2V to +10V systems where low input bias current, low input  
-
-
V
V
1
2
3
4
5
6
7
8
IC*  
G
16  
15  
14  
13  
12  
11  
10  
9
IC*  
G
capacitance, and fast switching speed are desired. The V  
of these  
GS(th)  
N2  
N1  
devices is set at +0.00V, which classifies them as both enhancement mode  
and depletion mode devices. When the gate is set at 0.00V, the drain  
M 2  
M 1  
D
V
S
D
S
N2  
N1  
current is +1µA @ V = 0.1V, which allows a class of circuits with output  
DS  
+
+
V
voltage level biased at or near input voltage level without voltage level  
shift. These devices exhibit well controlled turn-off and sub-threshold  
characteristics of standard enhancement mode MOSFETs.  
12  
-
-
V
V
34  
D
D
N4  
N3  
M 4  
M 3  
The ALD110800A/ALD110800/ALD110900A/ALD110900 are MOSFET  
devices that feature high input impedance (1012) and high DC current  
gain (>108). A sample calculation of the DC current gain at a drain current  
of 3mA and input leakage current of 30pA at 25°C is 3mA/30pA =  
100,000,000. For most applications, connect the V+ pin to the most posi-  
tive voltage and the V- and IC pins to the most negative voltage in the  
system. All other pins must have voltages within these voltage limits at all  
times.  
G
N4  
G
N3  
IC*  
IC*  
-
-
V
V
SCL, PCL PACKAGES  
ALD110900  
-
-
V
V
ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS))  
1
2
3
4
8
7
6
5
IC*  
G
IC*  
G
Operating Temperature Range*  
N2  
N1  
0°C to +70°C  
0°C to +70°C  
M 1  
M 2  
D
S
D
V
N1  
N2  
16-Pin  
SOIC  
Package  
16-Pin  
Plastic Dip  
Package  
8-Pin  
SOIC  
Package  
8-Pin  
Plastic Dip  
Package  
-
-
V
12  
ALD110800ASCL ALD110800APCL ALD110900ASAL ALD110900APAL  
ALD110800SCL ALD110800PCL ALD110900SAL ALD110900PAL  
* Contact factory for industrial temp. range or user-specified threshold voltage values.  
SAL, PAL PACKAGES  
*IC pins are internally connected, connect to V-  
Rev 2.1 ©2012 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, CA 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286  
www.aldinc.com  

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