ADVANCED
L
D
INEAR
ALD1105
EVICES, INC.
DUAL N-CHANNEL AND DUAL P-CHANNEL MATCHED PAIR MOSFET
APPLICATIONS
GENERAL DESCRIPTION
The ALD1105 is a monolithic dual N-channel and dual P-channel
complementary matched transistor pair intended for a broad range of
analog applications. These enhancement-mode transistors are
manufactured with Advanced Linear Devices' enhanced ACMOS silicon
gate CMOS process. It consists of an ALD1116 N-channel MOSFET pair
and an ALD1117 P-channel MOSFET pair in one package. The ALD1105
is a low drain current, low leakage current version of the ALD1103.
• Precision current mirrors
• Complementary push-pull linear drives
• Discrete Analog switches
• Analog signal Choppers
• Differential amplifier input stage
• Voltage comparator
• Data converters
• Sample and Hold
• Analog current inverter
• Precision matched current sources
TheALD1105offershighinputimpedanceandnegativecurrenttemperature
coefficient. The transistor pair is matched for minimum offset voltage and
differential thermal response, and it is designed for precision signal
switching and amplifying applications in +1V to +12V systems where low
input bias current, low input capacitance and fast switching speed are
desired. SincetheseareMOSFETdevices, theyfeatureverylarge(almost
infinite)currentgaininalowfrequency,ornearDC,operatingenvironment.
When used in complementary pairs, a dual CMOS analog switch can be
constructed. In addition, the ALD1105 is intended as a building block for
differential amplifier input stages, transmission gates, and multiplexer
applications.
PIN CONFIGURATION
DN1
GN1
SN1
1
2
3
4
5
6
14
13
DN2
GN2
12 SN2
+
-
V
11
10
9
V
The ALD1105 is suitable for use in precision applications which require
very high current gain, beta, such as current mirrors and current sources.
The high input impedance and the high DC current gain of the field effect
transistorsresultinextremelylowcurrentlossthroughthecontrolgate.The
DC current gain is limited by the gate input leakage current, which is
specifiedat30pAatroomtemperature. Forexample, DCbetaofthedevice
at a drain current of 3mA at 25°C is = 3mA/30pA = 100,000,000.
DP1
GP1
SP1
DP2
GP2
8
SP2
7
DB, PB, SB PACKAGE
FEATURES
• Thermal tracking between N-channel and P-channel pairs
• Low threshold voltage of 0.7V for both N-channel &
P-channel MOSFETs
BLOCK DIAGRAM
N GATE 1 (2)
• Low input capacitance
• Low Vos -- 10mV
• High input impedance -- 1013Ω typical
• Low input and output leakage currents
N SOURCE 1 (3)
SUBSTRATE (4)
N DRAIN 1 (1)
N DRAIN 2 (14)
• Negative current (I ) temperature coefficient
DS
N SOURCE 2 (12)
• Enhancement mode (normally off)
• DC current gain 109
• Matched N-channel pair and matched P-channel pair in one package
N GATE 2 (13)
P GATE 1 (6)
ORDERING INFORMATION
Operating Temperature Range*
-55°C to +125°C
0°C to +70°C
0°C to +70°C
P SOURCE 1 (7)
SUBSTRATE (11)
P DRAIN 1 (5)
P DRAIN 2 (10)
14-Pin
CERDIP
Package
14-Pin
Plastic Dip
Package
14-Pin
SOIC
Package
P SOURCE 2 (8)
ALD1105 DB
ALD1105 PB
ALD1105 SB
P GATE 2 (9)
* Contact factory for industrial temperature range.
© 2005Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089 -1706 Tel: (408) 747-1155 Fax: (408) 747-1286 http://www.aldinc.com