Datasheet > ALD1102DA

ALD1102DA

更新时间： 2024-02-01 08:14:58

品牌	Logo	应用领域
先进线性 - ALD		晶体晶体管开关输入元件
页数	文件大小	规格书
4页	31K
描述
DUAL P-CHANNEL MATCHED MOSFET PAIR

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ALD1102DA 技术参数

是否Rohs认证：	不符合	生命周期：	Contact Manufacturer
包装说明：	,	Reach Compliance Code：	unknown
风险等级：	5.69	Is Samacsys：	N
FET 技术：	METAL-OXIDE SEMICONDUCTOR	工作模式：	ENHANCEMENT MODE
最高工作温度：	70 °C	极性/信道类型：	P-CHANNEL
子类别：	Other Transistors	表面贴装：	YES
Base Number Matches：	1

ALD1102DA 数据手册

DVANCED

INEAR

EVICES, INC.

ALD1102A/ALD1102B

ALD1102

DUAL P-CHANNEL MATCHED MOSFET PAIR

GENERAL DESCRIPTION

APPLICATIONS

The ALD1102 is a monolithic dual P-channel matched transistor pair

intended for a broad range of analog applications. These enhancement-

mode transistors are manufactured with Advanced Linear Devices' en-

hanced ACMOS silicon gate CMOS process.

• Precision current mirrors

• Precision current sources

• Analog switches

• Choppers

• Differential amplifier

input stage

• Voltage comparator

• Data converters

• Sample and Hold

• Analog inverter

The ALD1102 offers high input impedance and negative current tempera-

ture coefficient. The transistor pair is matched for minimum offset voltage

and differential thermal response, and it is designed for switching and

amplifying applications in +2V to +12V systems where low input bias

current, low input capacitance and fast switching speed are desired. Since

theseareMOSFETdevices,theyfeatureverylarge(almostinfinite)current

gain in a low frequency, or near DC operating environment. When used

with an ALD1101, a dual CMOS analog switch can be constructed. In

addition, the ALD1102 is intended as a building block for differential

amplifier input stages, transmission gates, and multiplexer applications.

PIN CONFIGURATION

The ALD1102 is suitable for use in precision applications which require

very high current gain, beta, such as current mirrors and current sources.

The high input impedance and the high DC current gain of the Field Effect

Transistors result in extremely low current loss through the control gate.

The DC current gain is limited by the gate input leakage current, which is

specifiedat50pAatroomtemperature. Forexample, DCbetaofthedevice

at a drain current of 5mA at 25°C is = 5mA/50pA = 100,000,000.

SUBSTRATE

SOURCE

GATE

DRAIN

GATE

DRAIN

TOP VIEW

DA, PA, SA PACKAGE

FEATURES

• Low threshold voltage of 0.7V

• Low input capacitance

• Low Vos grades -- 2mV, 5mV, 10mV

• High input impedance -- 10¹²Ω typical

• Low input and output leakage currents

• Negative current (I ) temperature coefficient

• Enhancement-mode (normally off)

• DC current gain 10⁹

BLOCK DIAGRAM

GATE 1 (2)

ORDERING INFORMATION

Operating Temperature Range*

SOURCE 1 (1)

DRAIN 1 (3)

DRAIN 2 (5)

-55°C to +125°C

0°C to +70°C

SUBSTRATE (8)

8-Pin

CERDIP

Package

8-Pin

Plastic Dip

Package

8-Pin

SOIC

Package

SOURCE 2 (7)

GATE 2 (6)

ALD1102A PA

ALD1102B PA

ALD1102 PA

ALD1102 DA

ALD1102 SA

* Contact factory for industrial temperature range.

12 3 4

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与ALD1102DA相关器件

型号	品牌	描述	获取价格	数据表
ALD1102MA	ETC	TRANSISTOR \| MOSFET \| MATCHED PAIR \| P-CHANNEL \| 13.2V V(BR)DSS \| TO-99	获取价格
ALD1102PA	ALD	DUAL P-CHANNEL MATCHED MOSFET PAIR	获取价格
ALD1102PAL	ALD	DUAL P-CHANNEL MATCHED MOSFET PAIR	获取价格
ALD1102SA	ALD	DUAL P-CHANNEL MATCHED MOSFET PAIR	获取价格
ALD1102SAL	ALD	DUAL P-CHANNEL MATCHED MOSFET PAIR	获取价格
ALD1102Z	ETC	TRANSISTOR \| MOSFET \| MATCHED PAIR \| P-CHANNEL \| 13.2V V(BR)DSS \| CHIP	获取价格

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