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ALD1102A/ALD1102B
ALD1102
DUAL P-CHANNEL MATCHED MOSFET PAIR
GENERAL DESCRIPTION
APPLICATIONS
The ALD1102 is a monolithic dual P-channel matched transistor pair
intended for a broad range of analog applications. These enhancement-
mode transistors are manufactured with Advanced Linear Devices' en-
hanced ACMOS silicon gate CMOS process.
• Precision current mirrors
• Precision current sources
• Analog switches
• Choppers
• Differential amplifier input stage
• Voltage comparator
• Data converters
• Sample and Hold
• Analog inverter
The ALD1102 offers high input impedance and negative current tempera-
ture coefficient. The transistor pair is matched for minimum offset voltage
and differential thermal response, and it is designed for switching and
amplifying applications in +2V to +12V systems where low input bias
current, lowinputcapacitanceandfastswitchingspeedaredesired. Since
these are MOSFET devices, they feature very large (almost infinite)
current gain in a low frequency, or near DC, operating environment. When
used with an ALD1101, a dual CMOS analog switch can be constructed.
In addition, the ALD1102 is intended as a building block for differential
amplifier input stages, transmission gates, and multiplexer applications.
PIN CONFIGURATION
The ALD1102 is suitable for use in precision applications which require
very high current gain, beta, such as current mirrors and current sources.
The high input impedance and the high DC current gain of the Field Effect
Transistors result in extremely low current loss through the control gate.
The DC current gain is limited by the gate input leakage current, which is
specifiedat50pAatroomtemperature. Forexample,DCbetaofthedevice
at a drain current of 5mA at 25°C is = 5mA/50pA = 100,000,000.
1
8
SUBSTRATE
SOURCE
SOURCE
GATE
1
1
1
2
3
7
6
2
DRAIN
GATE
2
4
DRAIN
2
NC
5
TOP VIEW
SAL, PAL, DA PACKAGES
FEATURES
* NC pin is internally connected. Do not connect externally.
• Low threshold voltage of 0.7V
• Low input capacitance
• Low Vos grades -- 2mV, 5mV, 10mV
• High input impedance -- 1012Ω typical
• Low input and output leakage currents
• Negative current (I ) temperature coefficient
DS
• Enhancement-mode (normally off)
• DC current gain 109
• RoHS compliant
BLOCK DIAGRAM
GATE 1 (2)
ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS))
Operating Temperature Range
SOURCE 1 (1)
DRAIN 1 (3)
DRAIN 2 (5)
0°C to +70°C
0°C to +70°C
-55°C to +125°C
SUBSTRATE (8)
8-Pin
8-Pin
8-Pin
CERDIP
Package
SOURCE 2 (7)
Small Outline
Package (SOIC)
Plastic Dip
Package
ALD1102ASAL
ALD1102BSAL
ALD1102SAL
ALD1102APAL
ALD1102BPAL
ALD1102PAL
GATE 2 (6)
ALD1102DA
* Contact factory for leaded (non-RoHS) or high temperature versions.
Rev 2.0 ©2012 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, CA 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286
www.aldinc.com