A
L
D
DVANCED
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EVICES, INC.
ALD1101A/ALD1101B
ALD1101
DUAL N-CHANNEL MATCHED MOSFET PAIR
© 1998Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, California 94089 -1706 Tel: (408) 747-1155 Fax: (408) 747-1286 http://www.aldinc.com
GENERAL DESCRIPTION
APPLICATIONS
The ALD1101 is a monolithic dual N-channel matched transistor pair
intended for a broad range of analog applications. These enhancement-
mode transistors are manufactured with Advanced Linear Devices' en-
hanced ACMOS silicon gate CMOS process.
• Precision current mirrors
• Precision current sources
• Analog switches
• Choppers
• Differential amplifier
input stage
• Voltage comparator
• Data converters
• Sample and Hold
• Analog inverter
The ALD1101 offers high input impedance and negative current tempera-
ture coefficient. The transistor pair is matched for minimum offset voltage
and differential thermal response, and it is designed for switching and
amplifying applications in +2V to +12V systems where low input bias
current, lowinputcapacitanceandfastswitchingspeedaredesired. Since
these are MOSFET devices, they feature very large (almost infinite)
current gain in a low frequency, or near DC, operating environment. When
used with an ALD1102, a dual CMOS analog switch can be constructed.
In addition, the ALD1101 is intended as a building block for differential
amplifier input stages, transmission gates, and multiplexer applications.
PIN CONFIGURATION
The ALD1101 is suitable for use in precision applications which require
very high current gain, beta, such as current mirrors and current sources.
The high input impedance and the high DC current gain of the Field Effect
Transistors result in extremely low current loss through the control gate.
The DC current gain is limited by the gate input leakage current, which is
specifiedat50pAatroomtemperature. Forexample, DCbetaofthedevice
at a drain current of 5mA at 25°C is = 5mA/50pA = 100,000,000.
1
8
SUBSTRATE
SOURCE
SOURCE
1
GATE
2
3
7
6
1
1
2
DRAIN
GATE
2
4
DRAIN
2
NC
5
TOP VIEW
DA, PA, SA PACKAGE
FEATURES
• Low threshold voltage of 0.7V
• Low input capacitance
• Low Vos grades -- 2mV, 5mV, 10mV
• High input impedance -- 1012Ω typical
• Negative current (I ) temperature
DS
coefficient
• Enhancement-mode (normally off)
BLOCK DIAGRAM
• DC current gain 109
GATE 1 (2)
ORDERING INFORMATION
Operating Temperature Range*
SOURCE 1 (1)
DRAIN 1 (3)
DRAIN 2 (5)
-55°C to +125°C
0°C to +70°C
0°C to +70°C
SUBSTRATE (8)
SOURCE 2 (7)
8-Pin
CERDIP
8-Pin
Plastic Dip
8-Pin
SOIC
Package
Package
Package
ALD1101A PA
ALD1101B PA
ALD1101 PA
GATE 2 (6)
ALD1101 DA
ALD1101 SA
* Contact factory for industrial temperature range.
© 1998 Advanced Linear Devices, Inc. 415Tasman Drive, Sunnyvale, California 94089 -1706 Tel: (408) 747-1155 Fax: (408) 747-1286 http://www.aldinc.com