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AK7780VQ

更新时间： 2024-02-18 22:42:38
品牌 Logo 应用领域
AKM 消费电路商用集成电路
页数 文件大小 规格书
28页 455K
描述
24bit 5ch ADC & SRC + Audio DSP

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中文翻译

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AK7780VQ 技术参数

生命周期：Obsolete零件包装代码：QFP
包装说明：LFQFP,针数：100
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.84Is Samacsys：N
其他特性：ALSO IT REQUIRES 1.7V TO 2V SUPPLY商用集成电路类型：CONSUMER CIRCUIT
JESD-30 代码：S-PQFP-G100长度：14 mm
功能数量：1端子数量：100
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：LFQFP
封装形状：SQUARE封装形式：FLATPACK, LOW PROFILE, FINE PITCH
认证状态：Not Qualified座面最大高度：1.7 mm
最大供电电压 (Vsup)：3.6 V最小供电电压 (Vsup)：3 V
表面贴装：YES温度等级：INDUSTRIAL
端子形式：GULL WING端子节距：0.5 mm
端子位置：QUAD宽度：14 mm
Base Number Matches：1

AK7780VQ 数据手册

 浏览型号AK7780VQ的Datasheet PDF文件第2页浏览型号AK7780VQ的Datasheet PDF文件第3页浏览型号AK7780VQ的Datasheet PDF文件第4页浏览型号AK7780VQ的Datasheet PDF文件第5页浏览型号AK7780VQ的Datasheet PDF文件第6页浏览型号AK7780VQ的Datasheet PDF文件第7页 
[AK7780]  
AK7780  
24bit 5ch ADC & SRC + Audio DSP  
GENERAL DESCRIPTION  
The AK7780 is a highly integrated audio processor, including a 28-bit floating point DSP, two 24-bit stereo  
ADC’s and one mono ADC. The stereo ADC’s feature high performance, achieving 96dB dynamic range,  
they include 8:1 input selectors. The ADC supports sampling frequencies from 7.35 kHz to 96 kHz. The  
AK7780 also includes a stereo sample rate converter (SRC), so it can be used as a master device when  
it receives digital audio inputs. The DSP includes 168kbits of SRAM for audio delay data that is suitable  
for creating simulated surround fields. The programmable DSP block is realized with 2560step/fs DSP. It  
supports sampling frequencies from 7.35kHz to 96 kHz. The AK7780 is used to implement complete  
sound field control, such as echo, 3D, parametric equalization, and other sound enhancements. It is  
packaged in a 100-lead LQFP package.  
FEATURES  
[DSP]  
Main  
„ Word length: 28-bit (Data RAM F24.4 limited range floating point)  
„ Instruction cycle time: 8.1 ns (2560step/fs fs=48kHz; 1280step/fs fs=96kHz)  
„ Multiplier: 24 x 16 → 40-bit (Double precision available)  
„ Divider: 24 / 24 → 24-bit  
„ ALU: 44-bit arithmetic operation (overflow margin: 4-bits)  
F24.4 arithmetic and logic operation  
„ Shift+Register: Flexible setting  
„ Program RAM: 2048 x 36-bit  
„ Coefficient RAM: 2048 x 16-bit  
„ Data RAM: 2048 x 28-bit (F24.4[sign bit + 23-bit mantissa + 4-bit exponent])  
„ Offset RAM: 64 x 13-bit  
„ Internal Delay RAM: 168kbits  
( 6144 x 28 bit / 2048 x 28 bit + 8192 x 14 bit / 3072 x 28 bit + 6144 x 14 bit  
/ 4096 x 28 bit + 4096 x 14 bit) 4 pattern setting  
28bit = F24.4 [24 bit sign & mantissa: 4 bit exponent]  
14bit = F10.4 [10 bit sign & mantissa: 4 bit exponent]  
„ Sampling frequency: 7.35kHz ~ 96kHz  
„ Serial interface port for microcontroller or I2C BUS control  
„ Master Clock: 2560fs (generated by PLL from 32fs ,64fs, 256fs and 384fs)  
„ Master/Slave operation  
„ Serial signal input port (10ch): MSB justified 24-bit / LSB justified 16/20/24-bit and I2S  
„ Serial signal output port(12ch): MSB justified 24-bit / LSB justified 24,16-bit and I2S  
(SDOUT1,SDOUT2 and SDOUT3)  
[ADC]  
4 channels (2 stereo pairs)  
„ 24-bit 64X over-sampling delta-sigma (fs = 7.35kHz ~ 96kHz)  
„ DR, S/N: 96dBA (fs = 48kHz, fully-differential input)  
„ S/(N+D): 92dB (fs = 48kHz)  
„ Digital HPF (fc = 1Hz)  
- 1 -  
MS0581-E-00-PB  
2007/09  
1234567...28

中文翻译

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