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HDMP-1637A

更新时间: 2024-02-04 10:39:54
品牌 Logo 应用领域
安捷伦 - AGILENT 网络接口电信集成电路电信电路以太网以太网:16GBASE-T时钟
页数 文件大小 规格书
16页 253K
描述
Gigabit Ethernet SerDes Circuit with Differential PECL Clock Inputs

HDMP-1637A 技术参数

生命周期:Contact Manufacturer包装说明:FQFP,
Reach Compliance Code:compliantECCN代码:5A991.B.4.A
HTS代码:8542.39.00.01风险等级:5.8
JESD-30 代码:S-PQFP-G64长度:10 mm
功能数量:1端子数量:64
最高工作温度:70 °C最低工作温度:
封装主体材料:PLASTIC/EPOXY封装代码:FQFP
封装形状:SQUARE封装形式:FLATPACK, FINE PITCH
认证状态:Not Qualified座面最大高度:2.45 mm
标称供电电压:3.3 V表面贴装:YES
技术:BIPOLAR电信集成电路类型:ETHERNET TRANSCEIVER
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
宽度:10 mmBase Number Matches:1

HDMP-1637A 数据手册

 浏览型号HDMP-1637A的Datasheet PDF文件第2页浏览型号HDMP-1637A的Datasheet PDF文件第3页浏览型号HDMP-1637A的Datasheet PDF文件第4页浏览型号HDMP-1637A的Datasheet PDF文件第5页浏览型号HDMP-1637A的Datasheet PDF文件第6页浏览型号HDMP-1637A的Datasheet PDF文件第7页 
Gigabit Ethernet SerDes Circuit  
with Differential PECL Clock  
Inputs  
HDMP-1637A SerDes  
Features  
transmission, incorporating both  
the Gigabit Ethernet transmit and  
receive functions into a single  
device.  
• IEEE 802.3z Gigabit  
Ethernet Compatible,  
Supports 1250 MBd Gigabit  
Ethernet  
This chip is used to build a high  
speed interface (as shown in  
Figure 1) while minimizing board  
space, power, and cost. It is  
compatible with the IEEE 802.3z  
specification.  
• Based on X3T11 “10 Bit  
Specification”  
Low Power Consumption  
• 10 mm 64-pin PQFP Package  
• Transmitter and Receiver  
Functions Incorporated  
onto a Single IC  
• 5-Volt Tolerant I/Os  
• 10 Bit Wide Parallel TTL  
Compatible I/Os  
• Single +3.3 V Power Supply  
• Differential PECL Clock  
Inputs  
• 2 kV Human Body ESD  
Protection on all Pins  
original 10-bit wide parallel data.  
The receiver PLL locks onto the  
incoming serial signal and  
recovers the high speed serial  
clock and data. The serial data is  
converted back into 10-bit parallel  
data, recognizing the 8B/10B  
comma character to establish byte  
alignment.  
The transmitter section accepts  
10-bit wide parallel TTL data and  
serializes this data into a high  
speed serial data stream. The  
parallel data is expected to be  
“8B/10B” encoded data, or  
equivalent. This parallel data is  
latched into the input register of  
the transmitter section on the  
rising edge of the 125 MHz  
reference clock (used as the  
transmit byte clock).  
The recovered parallel data is  
presented to the user at TTL  
compatible outputs. The receiver  
section also recovers two 62.5  
MHz receiver byte clocks which  
are 180 degrees out of phase with  
each other. The parallel data is  
properly aligned with the rising  
edge of alternating clocks.  
Applications  
• 1250 MBd Gigabit  
Ethernet Interface  
• High Speed Proprietary  
Interface  
• Backplane Serialization /  
Bus Extender  
The transmitter section’s PLL  
locks to this user supplied 125  
MHz byte clock. This clock is then  
multiplied by 10, to generate the  
1250 MHz serial signal clock used  
to generate the high speed output.  
The high speed outputs are  
capable of interfacing directly to  
copper cables for electrical  
transmission or to a separate fiber  
optic module for optical  
Description  
For test purposes, the transceiver  
provides for on-chip local loop-  
back functionality controlled  
through an external input pin.  
Additionally, the byte  
synchronization feature may be  
disabled. This may be useful in  
proprietary applications which use  
alternative methods to align the  
parallel data.  
The HDMP-1637A transceiver is a  
single silicon bipolar integrated  
circuit packaged in a plastic QFP  
package. It provides a low-cost,  
low-power physical layer solution  
for 1250 MBd Gigabit Ethernet or  
proprietary link interfaces. It  
provides complete Serialize/  
transmission.  
The receiver section accepts a  
serial electrical data stream at  
1250 MBd and recovers the  
Deserialize (SerDes) for copper  
CAUTION: As with all semiconductor ICs, it is advised that normal static precautions be taken in handling  
and assembly of this component to prevent damage and/or degradation which may be induced by  
electrostatic discharge (ESD).  

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