Datasheet > AFE2124E

AFE2124E

更新时间： 2024-01-29 15:12:01

品牌	Logo	应用领域
BB		/
页数	文件大小	规格书
11页	189K
描述
Dual HDSL/SDSL ANALOG FRONT END

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AFE2124E 技术参数

是否Rohs认证：	不符合	生命周期：	Transferred
Reach Compliance Code：	unknown	风险等级：	5.71
数据速率：	1168 Mbps	JESD-30 代码：	R-PDSO-G48
JESD-609代码：	e0	功能数量：	2
端子数量：	48	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	SSOP	封装等效代码：	SSOP48,.4
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
电源：	3.3/5,5 V	认证状态：	Not Qualified
座面最大高度：	2.79 mm	子类别：	Other Telecom ICs
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	电信集成电路类型：	DIGITAL SLIC
温度等级：	INDUSTRIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	GULL WING	端子节距：	0.635 mm
端子位置：	DUAL	宽度：	7.49 mm
Base Number Matches：	1

AFE2124E 数据手册

AFE2124

For most current data sheet and other product

information, visit www.burr-brown.com

Dual HDSL/SDSL ANALOG FRONT END

FEATURES

● SERIAL DIGITAL INTERFACE

DESCRIPTION

Burr-Brown’s dual Analog Front End chip greatly re-

duces the size and cost of a DSL (Digital Subscriber

Line) system by providing all of the active analog

circuitry needed to connect two digital signal processors

to external compromise hybrids and line transformers.

The AFE2124 is optimized for HDSL (High bit rate

DSL) and for SDSL (symmetrical DSL) applications.

Because the transmit and receive filter responses auto-

matically change with clock frequency, the AFE2124 is

particularly suitable for multiple rate DSL systems. The

device operates over a wide range of data rates from

64kbps to 1168kbps.

● 48-LEAD SSOP PACKAGE

● E1, T1 AND SDSL OPERATION

● 64kbps TO 1168kbps OPERATION

● SCALEABLE DATA RATE

● 250mW POWER DISSIPATION PER

CHANNEL

● TWO COMPLETE HDSL ANALOG INTER-

FACES

● +5V POWER (5V or 3.3V Digital)

Functionally, each half of this unit consists of a transmit

and a receive section. The transmit section generates

analog signals from 2-bit digital symbol data and filters

the analog signals to create 2B1Q symbols. The on-

board differential line driver provides a 13.5dBm signal

to the telephone line. The receive section filters and

digitizes the symbol data received on the telephone line.

This IC operates on a single 5V supply. The digital

circuitry in the unit can be connected to a supply from

3.3V to 5V. It is housed in a 48-lead SSOP package.

txLINE

Pulse Former

txLINE

Line Driver

tx and rx

Control

Registers

tx and rx

Interface

Lines

Difference

Amplifier

rxHYB

rxLINE

Decimation

Filter

∆Σ

Modulator

rxLINE

Programmable

Gain Amp

1/2 of AFE2124

Patents Pending

International Airport Industrial Park

•

Mailing Address: PO Box 11400, Tucson, AZ 85734

•

Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706

• Tel: (520) 746-1111

Twx: 910-952-1111

•

Internet: http://www.burr-brown.com/

•

Cable: BBRCORP Telex: 066-6491

•

FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132

•

PDS-1538A

Printed in U.S.A. April, 1999

12 3 4 5 6 7...11

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与AFE2124E相关器件

型号	品牌	描述	获取价格	数据表
AFE2124E/1K	TI	Dual HDSL/SDSL ANALOG FRONT END	获取价格
AFE2124E/1KG4	TI	Dual HDSL/SDSL Analog Front End 48-SSOP	获取价格
AFE2124EG4	TI	DATACOM, DIGITAL SLIC, PDSO48, PLASTIC, SSOP-48	获取价格
AFE2126	BB	Dual HDSL/SDSL ANALOG FRONT END	获取价格
AFE2126E	BB	Dual HDSL/SDSL ANALOG FRONT END	获取价格
AFE2126E/1K	ETC	xDSL Interface	获取价格

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