I2C® CMOS 8 × 8 Unbuffered Analog
Switch Array with Dual/Single Supplies
Data Sheet
ADG2188
FEATURES
GENERAL DESCRIPTION
I2C-compatible interface
The ADG2188 is an analog cross point switch with an array size of
8 × 8. The switch array is arranged so that there are eight columns
by eight rows, for a total of 64 switch channels. The array is
bidirectional, and the rows and columns can be configured as
either inputs or outputs. Each of the 64 switches can be addressed
and configured through the I2C-compatible interface. Standard,
full speed, and high speed (3.4 MHz) I2C interfaces are supported.
Any simultaneous switch combination is allowed. An additional
feature of the ADG2188 is that switches can be updated simul-
3.4 MHz high speed I2C option
32-lead LFCSP_WQ (5 mm × 5 mm)
Double-buffered input logic
Simultaneous update of multiple switches
Up to 300 MHz bandwidth
Fully specified at dual 5 V/single +12 V operation
On resistance 35 Ω maximum
Low quiescent current < 20 µA
Qualified for automotive applications
RESET
taneously, using the LDSW command. In addition, a
option
allows all of the switch channels to be reset/off. At power on, all
switches are in the off condition. The device is packaged in a
32-lead, 5 mm × 5 mm LFCSP_WQ.
APPLICATIONS
AV switching in TV
Automotive infotainment
AV receivers
CCTV
Ultrasound applications
KVM switching
Telecom applications
Test equipment/instrumentation
PBX systems
FUNCTIONAL BLOCK DIAGRAM
V
V
V
L
DD
SS
ADG2188
1
1
INPUT
SCL
REGISTER
AND
7 TO 64
LATCHES
8 × 8 SWITCH ARRAY
X0 TO X7 (I/O)
SDA
DECODER
64
64
LDSW
LDSW
A2 A1 A0
GND
Y0 TO Y7 (I/O)
Figure 1.
Rev. B
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