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ADV3202 PDF预览

ADV3202

更新时间: 2024-11-20 06:36:27
品牌 Logo 应用领域
亚德诺 - ADI 开关
页数 文件大小 规格书
20页 330K
描述
300 MHz, 32 × 16 Buffered Analog Crosspoint Switch

ADV3202 数据手册

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300 MHz, 32 × 16 Buffered  
Analog Crosspoint Switch  
ADV3202/ADV3203  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
VPOS VNEG DVCC DGND  
Large, 32 × 16, nonblocking switch array  
G = +1 (ADV3202) or G = +2 (ADV3203) operation  
32 × 32 pin-compatible version available (ADV3200/ADV3201)  
Single +5 V, dual 2.5 V, or dual 3.3 V supply (G = +2)  
Serial programming of switch array  
2:1 OSD insertion mux per output  
CLK  
193-BIT SHIFT REGISTER  
DATA  
OUT  
DATA IN  
96  
97  
UPDATE  
CS  
PARALLEL LATCH  
ADV3202  
Input sync-tip clamp  
RESET  
(ADV3203)  
96  
High impedance output disable allows connection of  
multiple devices with minimal output bus load  
Excellent video performance  
16  
16 × 5:32  
DECODERS  
ENABLE/  
BYPASS  
ENABLE/  
DISABLE  
OUTPUT  
BUFFER  
G = +1  
SYNC-TIP  
CLAMP  
512  
60 MHz 0.1 dB gain flatness  
(G = +2)  
0.1% differential gain error (RL = 150 Ω)  
0.1° differential phase error (RL = 150 Ω)  
Excellent ac performance  
Bandwidth: >300 MHz  
SWITCH  
MATRIX  
OSD  
MUX  
Slew rate: >400 V/μs  
Low power: 1 W  
Low all hostile crosstalk: −48 dB @ 5 MHz  
Reset pin allows disabling of all outputs  
Connected through a capacitor to ground, provides  
power-on reset capability  
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32  
INPUTS  
16  
OUTPUTS  
176-lead exposed pad LQFP package (24 mm × 24 mm)  
16  
16  
REFERENCE  
APPLICATIONS  
CCTV surveillance  
VCLAMP  
OSD  
OSD  
VREF  
INPUTS SWITCHES  
Routing of high speed signals, including  
Composite video (NTSC, PAL, S, SECAM)  
RGB and component video routing  
Compressed video (MPEG, wavelet)  
Video conferencing  
Figure 1.  
GENERAL DESCRIPTION  
The ADV3202/ADV3203 are 32 × 16 analog crosspoint switch  
matrices. They feature a selectable sync-tip clamp input for  
ac-coupled applications and a 2:1 on-screen display (OSD)  
insertion mux. With −48 dB of crosstalk and −80 dB isolation  
at 5 MHz, the ADV3202/ADV3203 are useful in many high  
density routing applications. The 0.1 dB flatness out to 60 MHz  
makes the ADV3202/ADV3203 ideal for both composite and  
component video switching.  
an output bus if building a larger array. The ADV3202 has a  
gain of +1 while the ADV3203 has a gain of +2 for ease of use in  
back-terminated load applications. A single +5 V supply, dual  
2.5 V supplies, or dual 3.3 V supplies (G = +2) can be used  
while consuming only 195 mA of idle current with all outputs  
enabled. The channel switching is performed via a double  
buffered, serial digital control that can accommodate daisy  
chaining of several devices.  
The 16 independent output buffers of the ADV3202/ADV3203  
can be placed into a high impedance state for paralleling cross-  
point outputs so that off-channels present minimal loading to  
The ADV3202/ADV3203 are packaged in a 176-lead exposed  
pad LQFP package (24 mm× 24 mm) and are available over the  
extended industrial temperature range of −40°C to +85°C.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2008 Analog Devices, Inc. All rights reserved.  
 

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