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ADV212BBCZ-115 PDF预览

ADV212BBCZ-115

更新时间: 2024-11-20 03:17:55
品牌 Logo 应用领域
亚德诺 - ADI 解码器编解码器消费电路商用集成电路
页数 文件大小 规格书
44页 389K
描述
JPEG 2000 Video Codec

ADV212BBCZ-115 数据手册

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JPEG 2000 Video Codec  
ADV212  
FEATURES  
GENERAL DESCRIPTION  
Complete single-chip JPEG 2000 compression and  
decompression solution for video and still images  
Identical in pinout and footprint to the ADV202 and  
supports all the functionality of the ADV202  
Power reduction of at least 30% compared with ADV202  
JTAG/boundary scan support  
Patented SURF® (spatial ultraefficient recursive filtering)  
technology enables low power, low cost wavelet-based  
compression  
The ADV212 is a single-chip JPEG 2000 codec targeted for  
video and high bandwidth image compression applications that  
can benefit from the enhanced quality and features provided by  
the JPEG 2000 (J2K)—ISO/IEC15444-1 image compression  
standard. The part implements the computationally intensive  
operations of the JPEG 2000 image compression standard and  
provides fully compliant code-stream generation for most  
applications.  
Supports both 9/7 and 5/3 wavelet transforms with up to  
6 levels of transform  
The dedicated video port of the ADV212 provides glueless con-  
nection to common digital video standards such as ITU-R BT.656,  
SMPTE 125M, SMPTE 293M (525p), ITU-R BT.1358 (625p),  
SMPTE 274M (1080i), or SMPTE 296M (720p). A variety of  
other high speed, synchronous pixel and video formats can also  
be supported by using the programmable framing and  
validation signals.  
Video interface directly supporting ITU-R BT.656,  
SMPTE 125M PAL/NTSC, SMPTE 274M, SMPTE 293M  
(525p), and ITU-R BT.1358 (625p), or any video format with  
a maximum input rate of 65 MSPS for irreversible mode or  
40 MSPS for reversible mode  
Programmable tile/image size with widths up to 4096 pixels  
in single-component mode; maximum tile/image height:  
4096 pixels  
2 or more ADV212s can be combined to support full-frame  
SMPTE 274M HDTV (1080i) or SMPTE 296M (720p)  
Flexible, asynchronous SRAM-style host interface allows glue-  
less connection to most 16-/32-bit microcontrollers and ASICs  
2.5 V or 3.3 V input/output and 1.5 V core supply  
12 mm × 12 mm, 121-ball CSPBGA with a speed grade of  
115 MHz, or 13 mm × 13 mm, 144-ball CSPBGA with a  
speed grade of 150 MHz  
The ADV212 is an upgrade version of the ADV202 that is  
identical in pinout and footprint. It supports all the functionality  
of the ADV202 and has the following additional options:  
JTAG/boundary scan support  
Power reduction of at least 30% compared with the  
ADV202  
APPLICATIONS  
Networked video and image distribution systems  
Wireless video and image distribution  
Image archival/retrieval  
Digital CCTV and surveillance systems  
Digital cinema systems  
Professional video editing and recording  
Digital still cameras  
Digital camcorders  
FUNCTIONAL BLOCK DIAGRAM  
WAVELET  
PIXEL I/F  
HOST I/F  
EC1  
EC2  
EC3  
PIXEL I/F  
ENGINE  
EXTERNAL  
DMA CTRL  
PIXEL FIFO  
CODE FIFO  
ATTR FIFO  
INTERNAL BUS AND DMA ENGINE  
EMBEDDED  
RISC  
PROCESSOR  
SYSTEM  
RAM  
ROM  
ADV212  
Figure 1.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Fax: 781.461.3113  
www.analog.com  
©2006 Analog Devices, Inc. All rights reserved.  
 

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