Datasheet > 微控制器和处理器 > 数字信号处理器> ADSP-21365SCSQZENG

ADSP-21365SCSQZENG

更新时间： 2024-11-20 21:54:15

品牌	Logo	应用领域
亚德诺 - ADI		微控制器和处理器外围集成电路数字信号处理器时钟
页数	文件大小	规格书
54页	523K
描述
SHARC Processor

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中文翻译

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数据手册

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SHARC^®Processor

Preliminary Technical Data

SUMMARY

High performance 32-bit/40-bit floating point processor

optimized for high performance automotive audio

processing

ADSP-21365/ADSP-21366

Single-Instruction Multiple-Data (SIMD) computational

architecture

On-chip memory—3M bit of on-chip SRAM and a dedicated

4M bit of on-chip mask-programmable ROM

Code compatible with all other members of the SHARC family

The ADSP-21365/6 is available with a 333 MHz core instruc-

tion rate and unique audio centric peripherals such as the

Digital Audio Interface, S/PDIF transceiver, DTCP (Digital

Content Transmission Protocol) available on the ADSP-

21365 only, serial ports, 8-channel asynchronous sample

rate converter, precision clock generators and more. For

complete ordering information, see Ordering Guide on

page 51

Audio decoder and post processor-algorithm support with

32-bit floating-point implementations

Non-volatile memory may be configured to support audio

decoders and post processor-algorithms like PCM, Dolby

Digital EX, Dolby Prologic IIx, DTS 96/24, Neo:6, DTS ES,

MPEG2 AAC, MPEG2 2channel, MP3, and functions like

Bass management, Delay, Speaker equalization, Graphic

equalization, and more. Decoder/post-processor algo-

rithm combination support will vary depending upon the

chip version and the system configurations. Please visit

www.analog.com/SHARC

4 BLOCKS OF ON-CHIP MEMORY

CORE PROCESSOR

INSTRUCTION

BLOCK 0

SRAM

1M BIT ROM

2M BIT

BLOCK 1

BLOCK 2

BLOCK 3

SRAM

1M BIT

CACHE

TIMER

SRAM

0.5M BIT

SRAM

0.5M BIT

ROM

2M BIT

32 X 48-BIT

ADDR

DATA

ADDR

DATA

ADDR

DATA

ADDR

DATA

DAG1

8X4X32

DAG2

8X4X32

PROGRAM

SEQUENCER

PM ADDRESS BUS

DM ADDRESS BUS

PM DATA BUS

DM DATA BUS

IOA

IOD

IOA

IOD

IOA

IOD

IOA

IOD

PX REGISTER

SPI

SPORTS

IDP

PCG

TIMERS

SRC

PROCESSING

ELEMENT

(PEX)

PROCESSING

ELEMENT

(PEY)

IOP REGISTERS

(MEMORY MAPPED)

SIGNAL

ROUTING

UNIT

SPDIF

DTCP

JTAG TEST & EMULATION

I/O PROCESSOR

AND PERIPHERALS

SEE “ADSP-21365/6 MEMORY

AND I/O INTERFACE FEATURES”

SECTION FOR DETAILS

Figure 1. Functional Block Diagram – Processor Core

SHARC and the SHARC logo are registered trademarks of Analog Devices, Inc.

Rev. PrA

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective companies.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106 U.S.A.

Tel:781.329.4700

Fax:781.326.8703

www.analog.com

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与ADSP-21365SCSQZENG相关器件

型号	品牌	获取价格	描述	数据表
ADSP-21365SKBC-ENG	ADI	获取价格	SHARC Processor
ADSP-21365SKBCZENG	ADI	获取价格	SHARC Processor
ADSP-21365SKSQ-ENG	ADI	获取价格	SHARC Processor
ADSP-21365SKSQZENG	ADI	获取价格	SHARC Processor
ADSP-21365WBSWZ-1A	ADI	获取价格	IC 16-BIT, 55.55 MHz, OTHER DSP, PQFP144, MS-026BFB-HD, LQFP-144, Digital Signal Processor
ADSP-21365WSQZ-2AA	ADI	获取价格	IC 16-BIT, OTHER DSP, PQFP144, LEAD FREE, MS-026BFB-HD, LQFP-144, Digital Signal Processor
ADSP-21365WYSWZ-2A	ADI	获取价格	IC 16-BIT, 55.55 MHz, OTHER DSP, PQFP144, MS-026BFB-HD, LQFP-144, Digital Signal Processor
ADSP-21365WYSWZ-2C	ADI	获取价格	IC 16-BIT, 55.55 MHz, OTHER DSP, PQFP144, MS-026BFB-HD, LQFP-144, Digital Signal Processor
ADSP-21366	ADI	获取价格	SHARC Processor
ADSP-21366BBC-1AA	ADI	获取价格	SHARC Processor

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