ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢃ
ꢅ
SBAS124C − DECEMBER 1999 − REVISED DECEMBER 2005
ꢆ
ꢇ
ꢈ
ꢉ
ꢊ
ꢋ
ꢌ
ꢍ
ꢇ
ꢈ
ꢎ
ꢂ
ꢏ
ꢂ
ꢌ
ꢁ
ꢀ
ꢋ
ꢀ
ꢀ
ꢐ
ꢑ
ꢒ
ꢊ
ꢂ
ꢊ
ꢋ
ꢊ
ꢓ
ꢔ
ꢂ
ꢕ
ꢂ
ꢋ
ꢖ
ꢗ
ꢘ
ꢊ
ꢋ
ꢙ
ꢀ
ꢔ
ꢀ
ꢚ
ꢓ
ꢛ
ꢈ
ꢋ
ꢓ
ꢈ
ꢁ
ꢊ
ꢛ
ꢊ
ꢋ
ꢀ
ꢚ
ꢐ
ꢓ
ꢔ
ꢜ
ꢖ
ꢝ
ꢋ
ꢖ
ꢝ
ꢌ
ꢗ
ꢒ
ꢞ
ꢌ
ꢏ
ꢛ
ꢀ
ꢌ
ꢀ
ꢔ
ꢁ
ꢝ
ꢖ
ꢟ
ꢖ
ꢝ
ꢖ
ꢔ
ꢐ
ꢖ
FEATURES
DESCRIPTION
D
D
PGA Gains: 1, 2, 4, 5, 8, 10, 16, 20 V/V
Programmable Input (Up to 4-Channel
Differential/Up to 8-Channel Single-Ended or
Some Combination)
The ADS7870 (US patents 6140872, 6060874) is a
complete low-power data acquisition system on a single
chip. It consists of a 4-channel differential/8-channel
single-ended multiplexer, precision programmable gain
amplifier, 12-bit successive approximation analog-to-
digital (A/D) converter, and a precision voltage reference.
D
D
1.15-V, 2.048-V, or 2.5-V Internal Reference
SPI/DSP Compatible Serial Interface
(≤ 20 MHz)
Throughput Rate: 52 kSamples/sec
The programmable-gain amplifier provides high input
impedance, excellent gain accuracy, good common-mode
rejection, and low noise.
D
D
D
D
D
D
D
Error Overload Indicator
For many low-level signals, no external amplification or
impedance buffering is needed between the signal source
and the A/D input.
Programmable Output 2s Complement/Binary
2.7-V to 5.5-V Single Supply Operation
4-Bit Digital I/O Via Serial Interface
Pin-Compatible With ADS7871
SSOP-28 Package
The offset voltage of the PGA is auto-zeroed. Gains of 1,
2, 4, 5, 8, 10, 16, and 20 V/V allow signals as low as 125
mV to produce full-scale digital outputs.
The ADS7870 contains an internal reference, which is
trimmed for high initial accuracy and stability vs
temperature. Drift is typically 10 ppm/°C. An external
reference can be used in situations where multiple
ADS7870s share a common reference.
APPLICATIONS
D
D
D
D
Portable Battery-Powered Systems
Low-Power Instrumentation
Low-Power Control Systems
Smart Sensor Applications
The serial interface allows the use of SPI, QSPI,
Microwire, and 8051-family protocols, without glue logic.
BUFIN
BUFOUT/REFIN
REF
VREF
CCLK
Oscillator
LN0
LN1
LN2
LN3
LN4
LN5
LN6
LN7
OSC ENABLE
+
BUSY
12-BIT
A/D
PGA
MUX
_
CONVERT
RESET
RISE/FALL
CS
Serial
Interface
SCLK
I/O0
I/O1
I/O2
I/O3
Digital
I/O
DIN
Registers
DOUT
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
QSPI and SPI are trademarks of Motorola, Inc.
Microwire is a trademark of National Semiconductor Corporation.
All other trademarks are the property of their respective owners.
ꢏꢝ ꢓ ꢁꢒ ꢐ ꢋꢊ ꢓꢔ ꢁ ꢀꢋꢀ ꢠꢡ ꢢꢣ ꢤ ꢥꢦ ꢧꢠꢣꢡ ꢠꢨ ꢩꢪ ꢤ ꢤ ꢫꢡꢧ ꢦꢨ ꢣꢢ ꢬꢪꢭ ꢮꢠꢩ ꢦꢧꢠ ꢣꢡ ꢯꢦ ꢧꢫꢰ ꢏꢤ ꢣꢯꢪ ꢩꢧꢨ
ꢩ ꢣꢡ ꢢꢣꢤ ꢥ ꢧꢣ ꢨ ꢬꢫ ꢩ ꢠ ꢢꢠ ꢩ ꢦ ꢧꢠ ꢣꢡꢨ ꢬ ꢫꢤ ꢧꢱꢫ ꢧꢫ ꢤ ꢥꢨ ꢣꢢ ꢋꢫꢲ ꢦꢨ ꢊꢡꢨ ꢧꢤ ꢪꢥ ꢫꢡꢧ ꢨ ꢨꢧ ꢦꢡꢯ ꢦꢤ ꢯ ꢳ ꢦꢤ ꢤ ꢦ ꢡꢧꢴꢰ
ꢏꢤ ꢣ ꢯꢪꢩ ꢧ ꢠꢣ ꢡ ꢬꢤ ꢣ ꢩ ꢫ ꢨ ꢨ ꢠꢡ ꢵ ꢯꢣ ꢫ ꢨ ꢡꢣꢧ ꢡꢫ ꢩꢫ ꢨꢨ ꢦꢤ ꢠꢮ ꢴ ꢠꢡꢩ ꢮꢪꢯ ꢫ ꢧꢫ ꢨꢧꢠ ꢡꢵ ꢣꢢ ꢦꢮ ꢮ ꢬꢦ ꢤ ꢦꢥ ꢫꢧꢫ ꢤ ꢨꢰ
Copyright 1999−2005, Texas Instruments Incorporated