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ADS5541

更新时间： 2024-09-16 22:50:07
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30页 399K
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14-Bit, 80MSPS Analog-to-Digital Converter

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ADS5541 数据手册

 浏览型号ADS5541的Datasheet PDF文件第2页浏览型号ADS5541的Datasheet PDF文件第3页浏览型号ADS5541的Datasheet PDF文件第4页浏览型号ADS5541的Datasheet PDF文件第5页浏览型号ADS5541的Datasheet PDF文件第6页浏览型号ADS5541的Datasheet PDF文件第7页 
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SBAS308A − MAY 2004 − REVISED MARCH 2005  
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D
Pin-Compatible with:  
FEATURES  
− ADS5500 (14-Bit, 125MSPS)  
− ADS5541 (14-Bit, 105MSPS)  
− ADS5520 (12-Bit, 125MSPS)  
− ADS5521 (12-Bit, 105MSPS)  
− ADS5522 (12-Bit, 80MSPS)  
D
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14-Bit Resolution  
80MSPS Sample Rate  
High SNR: 72.9dBFS at 100 MHz f  
IN  
High SFDR: 88dBc at 100 MHz f  
IN  
APPLICATIONS  
D
2.3V Differential Input Voltage  
PP  
Wireless Communication  
− Communication Receivers  
− Base Station Infrastructure  
Internal Voltage Reference  
3.3V Single-Supply Voltage  
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Test and Measurement Instrumentation  
Single and Multichannel Digital Receivers  
Analog Power Dissipation: 545mW  
− Output Buffer Power: 129mW  
Communication Instrumentation  
− Radar, Infrared  
D
D
TQFP-64 PowerPADE Package  
Recommended Op Amps:  
THS3202, THS3201, THS4503,  
OPA695, OPA847  
Video and Imaging  
Medical Equipment  
Military Equipment  
DESCRIPTION  
The ADS5542 is a high-performance, 14-bit, 80MSPS analog-to-digital converter (ADC). To provide a complete converter  
solution, it includes a high-bandwidth linear sample-and-hold stage (S&H) and internal reference. Designed for  
applications demanding the highest speed and highest dynamic performance in very little space, the ADS5542 has  
excellent analog power dissipation of 545mW and output buffer power dissipation of 129mW from a 3.3V single-supply  
voltage. This allows an even higher system integration density. The provided internal reference simplifies system design  
requirements. Parallel CMOS compatible output ensures seamless interfacing with common logic.  
The ADS5542 is available in a 64-pin TQFP PowerPAD package and is pin-compatible with the ADS5500, ADS5541,  
ADS5520, ADS5521, and ADS5522. This device is specified over the full temperature range of −40°C to +85°C.  
AVDD  
DRVDD  
CLK+  
CLK  
CLKOUT  
Timing Circuitry  
−
D0  
V +  
14−Bit  
Pipeline  
ADC Core  
Digital  
Error  
Correction  
IN  
.
.
.
Output  
Control  
S&H  
V
−
IN  
D13  
OVR  
DFS  
Control Logic  
Internal  
Reference  
CM  
Serial Programming Register  
ADS5542  
AGND  
DRGND  
SCLK  
SEN  
SDATA  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments  
semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PowerPad is a trademark of Texas Instruments. All other trademarks are the property of their respective owners.  
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ꢋꢖ ꢐ ꢦꢣꢢ ꢅ ꢄꢐ ꢍ ꢤꢖ ꢐ ꢢ ꢕ ꢡ ꢡ ꢄꢍ ꢑ ꢦꢐ ꢕ ꢡ ꢍꢐꢅ ꢍꢕ ꢢꢕ ꢡꢡ ꢎꢖ ꢄꢏ ꢫ ꢄꢍꢢ ꢏꢣꢦ ꢕ ꢅꢕ ꢡꢅꢄ ꢍꢑ ꢐꢟ ꢎꢏ ꢏ ꢤꢎ ꢖ ꢎꢠ ꢕꢅꢕ ꢖ ꢡꢧ  
Copyright 2004−2005, Texas Instruments Incorporated  
www.ti.com  
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