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ADS41B25IRGZT

更新时间： 2024-09-16 08:19:51
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德州仪器 - TI 转换器模数转换器
页数 文件大小 规格书
57页 1322K
描述
12-Bit, 125MSPS, Ultralow-Power ADC with Analog Buffer

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ADS41B25IRGZT 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：QFN
包装说明：HVQCCN, LCC48,.27SQ,20针数：48
Reach Compliance Code：compliantECCN代码：3A991.C.2
HTS代码：8542.39.00.01风险等级：1.26
最大模拟输入电压：1.5 V最小模拟输入电压：-1.5 V
转换器类型：ADC, PROPRIETARY METHODJESD-30 代码：S-PQCC-N48
JESD-609代码：e4长度：7 mm
最大线性误差 (EL)：0.0854%湿度敏感等级：3
模拟输入通道数量：1位数：12
功能数量：1端子数量：48
最高工作温度：85 °C最低工作温度：-40 °C
输出位码：OFFSET BINARY, 2'S COMPLEMENT BINARY输出格式：PARALLEL, WORD
封装主体材料：PLASTIC/EPOXY封装代码：HVQCCN
封装等效代码：LCC48,.27SQ,20封装形状：SQUARE
封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度（摄氏度）：260
电源：1.8,3.3 V认证状态：Not Qualified
采样速率：125 MHz座面最大高度：1 mm
子类别：Analog to Digital Converters最大压摆率：73 mA
标称供电电压：1.8 V表面贴装：YES
温度等级：INDUSTRIAL端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式：NO LEAD端子节距：0.5 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：7 mmBase Number Matches：1

ADS41B25IRGZT 数据手册

 浏览型号ADS41B25IRGZT的Datasheet PDF文件第2页浏览型号ADS41B25IRGZT的Datasheet PDF文件第3页浏览型号ADS41B25IRGZT的Datasheet PDF文件第4页浏览型号ADS41B25IRGZT的Datasheet PDF文件第5页浏览型号ADS41B25IRGZT的Datasheet PDF文件第6页浏览型号ADS41B25IRGZT的Datasheet PDF文件第7页 
ADS41B25  
www.ti.com  
SBAS548 –JUNE 2011  
12-Bit, 125MSPS, Ultralow-Power ADC with Analog Buffer  
Check for Samples: ADS41B25  
1
FEATURES  
DESCRIPTION  
The ADS41B25 is a member of the ultralow-power  
ADS4xxx analog-to-digital converter (ADC) family,  
featuring integrated analog input buffers. This device  
uses innovative design techniques to achieve high  
dynamic performance, while consuming extremely  
low power. The analog input pins have buffers, with  
the benefits of constant performance and input  
impedance across a wide frequency range. The  
device is well-suited for multi-carrier, wide bandwidth  
23  
•
Resolution: 12-Bit, 125MSPS  
Integrated High-Impedance  
Analog Input Buffer:  
•
–
–
Input Capacitance at dc: 3.5pF  
Input Resistance at dc: 10kΩ  
•
•
Maximum Sample Rate: 125MSPS  
Ultralow Power:  
–
–
–
1.8V Analog Power: 114mW  
3.3V Buffer Power: 96mW  
I/O Power: 100mW (DDR LVDS)  
communications  
linearization.  
applications  
such  
as  
PA  
The ADS41B25 has features such as digital gain and  
offset correction. The gain option can be used to  
improve SFDR performance at lower full-scale input  
ranges, especially at high input frequencies. The  
integrated dc offset correction loop can be used to  
estimate and cancel the ADC offset. At lower  
sampling rates, the ADC automatically operates at  
scaled-down power with no loss in performance.  
•
•
High Dynamic Performance:  
–
–
SNR: 68.3dBFS at 170MHz  
SFDR: 87dBc at 170MHz  
Output Interface:  
–
Double Data Rate (DDR) LVDS with  
Programmable Swing and Strength:  
–
–
–
–
Standard Swing: 350mV  
Low Swing: 200mV  
Default Strength: 100Ω Termination  
2x Strength: 50Ω Termination  
The device supports both double data rate (DDR)  
low-voltage differential signaling (LVDS) and parallel  
CMOS digital output interfaces. The low data rate of  
the DDR LVDS interface (maximum 500MBPS)  
makes it possible to use low-cost field-programmable  
gate array (FPGA)-based receivers. The device has a  
low-swing LVDS mode that can be used to further  
reduce the power consumption. The strength of the  
LVDS output buffers can also be increased to support  
50Ω differential termination.  
–
1.8V Parallel CMOS Interface Also  
Supported  
•
•
•
•
Programmable Gain for SNR/SFDR Trade-Off  
DC Offset Correction  
Supports Low Input Clock Amplitude  
Package: QFN-48 (7mm × 7mm)  
The device is available in a compact QFN-48  
package and is specified over the industrial  
temperature range (–40°C to +85°C).  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
3
PowerPAD is a trademark of Texas Instruments, Incorporated.  
All other trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2011, Texas Instruments Incorporated  
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ADS41B25IRGZT 替代型号

型号 品牌 替代类型 描述 数据表
ADS41B25IRGZR TI

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 12-Bit, 125MSPS, Ultralow-Power ADC with Analog Buffer

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