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ADS2807Y1K5 PDF预览

ADS2807Y1K5

更新时间: 2024-11-01 12:36:43
品牌 Logo 应用领域
德州仪器 - TI 转换器
页数 文件大小 规格书
24页 1082K
描述
Dual, 12-Bit, 50MHz Sampling ANALOG-TO-DIGITAL CONVERTER

ADS2807Y1K5 数据手册

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ADS2807  
ADS2807  
SBAS169B NOVEMBER 2000 REVISED MAY 2002  
Dual, 12-Bit, 50MHz Sampling  
ANALOG-TO-DIGITAL CONVERTER  
FEATURES  
APPLICATIONS  
HIGH SNR: 66dB (2Vp-p), 68dB (3Vp-p)  
COMMUNICATIONS IF PROCESSING  
COMMUNICATIONS BASESTATIONS  
TEST EQUIPMENT  
LOW POWER: 720mW  
INTERNAL OR EXTERNAL REFERENCE  
LOW DLE: 0.6LSB  
MEDICAL IMAGING  
FLEXIBLE INPUT RANGE: 2Vp-p to 3Vp-p  
TQFP-64 POWER PACKAGE  
VIDEO DIGITIZING  
CCD DIGITIZING  
The ADS2807 provides an over-range indicator flag to  
indicate an input signal that exceeds the full-scale input  
range of the converter. This flag can be used to reduce the  
gain of front-end gain control circuitry. There is also an  
output enable pin to allow for multiplexing and testability on  
a PC board.  
DESCRIPTION  
The ADS2807 is a dual, high-speed, high dynamic range,  
12-bit pipelined Analog-to-Digital Converter (ADC). This  
converter includes a high-bandwidth track-and-hold that  
gives excellent spurious performance up to and beyond the  
Nyquist rate. The differential nature of this track-and-hold  
and ADC circuitry minimizes even-order harmonics and  
gives excellent common-mode noise immunity. The track-  
and-hold can also be operated single-ended.  
The ADS2807 employs digital error correction techniques to  
provide excellent differential linearity for demanding imag-  
ing applications. The ADS2807 is available in a TQFP-64  
power package.  
The ADS2807 provides for setting the full-scale range of the  
converter without any external reference circuitry. The inter-  
nal reference can be disabled allowing low-drive, external  
references to be used for improved tracking in multichannel  
systems.  
+VS  
OEA OVRA  
ADS2807  
CMA  
INA  
D12A  
Error  
VIN  
12-Bit  
Pipelined  
ADC  
3-State  
Outputs  
T&H  
Correction  
Logic  
D1A  
INA  
(Opt.)  
INT/EXT  
FSSEL  
Internal  
Reference  
Timing  
Circuitry  
CLK  
VIN  
D12B  
INB  
12-Bit  
Pipelined  
ADC  
Error  
Correction  
Logic  
3-State  
Outputs  
T&H  
D1B  
INB  
(Opt.)  
CMB  
OEB  
OVRB  
Optional External  
Reference  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2000, Texas Instruments Incorporated  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
www.ti.com  

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