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ADS1174
ADS1178
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SBAS373–OCTOBER 2007
Quad/Octal, Simultaneous Sampling, 16-Bit Analog-to-Digital Converters
1
FEATURES
DESCRIPTION
234
•
Synchronously Sample Four/Eight Channels
•
•
Selectable Operating Modes:
High-Speed: 52kSPS Data Rate, 30mW/ch
Low-Power: 10kSPS Data Rate, 8mW/ch
The ADS1174 (quad) and ADS1178 (octal) are
multiple delta-sigma (ΔΣ) analog-to-digital converters
(ADCs) with data rates up to 52k samples-per-second
(SPS), which allow synchronous sampling of four and
eight channels. These devices use identical
packages, permitting drop-in expandability.
AC Performance:
25kHz Bandwidth
97dB SNR
The delta-sigma architecture offers near ideal 16-bit
ac performance (97dB SNR, –105dB THD, 1LSB
linearity) combined with 0.005dB passband ripple,
and linear phase response.
–105dB THD
•
Digital Filter:
Linear Phase Response
Passband Ripple: ±0.005dB
Stop Band Attenuation: 100dB
The high-order, chopper- stabilized modulator
achieves very low drift (4μV/°C offset, 4ppm/°C gain)
and low noise (1LSBPP). The on-chip finite impulse
•
Selectable SPI™ or Frame Sync Serial
Interface
response (FIR) filter provides
a usable signal
•
•
•
•
•
•
Simple Pin-Driven Control
Low Sampling Aperture Error
Specified from –40°C to +105°C
Analog Supply: 5V
bandwidth up to 90% of the Nyquist rate with 100dB
of stop band attenuation while suppressing modulator
and signal out-of-band noise.
Two operating modes allow for optimization of speed
and power: High-speed mode (32mW/Ch at 52kSPS),
and Low-power mode (8mW/Ch at 10kSPS).
I/O Supply: 1.8V to 3.3V
Digital Core Supply: 1.8V
A
SYNC input control pin allows the device
conversions to be started and synchronized to an
external event. SPI and Frame-Sync serial interfaces
are supported. The device is fully specified over the
extended industrial range (–40°C to +105°C) and is
available in an HTQFP-64 PowerPAD™ package.
APPLICATIONS
•
•
•
•
3-Phase Power Monitors
Defibrillators and ECG Monitors
Coriolis Flow Meters
Vibration/Modal Analysis
VREFP VREFN AVDD DVDD
IOVDD
VREFP VREFN AVDD
DVDD
IOVDD
DS
DS
DS
DS
Input1
Input2
Input3
Input4
Input1
Input2
Input3
Input4
Input5
Input6
Input7
Input8
SPI
and
SPI
and
DRDY/FSYNC
SCLK
DRDY/FSYNC
SCLK
DS
DS
DS
Frame-
Sync
Frame-
Sync
DOUT[4:1]
DIN
DOUT[8:1]
DIN
Interface
Interface
Four
Digital
Filters
DS
Eight
Digital
Filters
TEST[1:0]
FORMAT[2:0]
CLK
TEST[1:0]
FORMAT[2:0]
CLK
DS
Control
Logic
Control
Logic
DS
DS
DS
SYNC
SYNC
PWDN[4:1]
CLKDIV
MODE
PWDN[8:1]
CLKDIV
MODE
AGND
DGND
AGND
DGND
ADS1174
ADS1178
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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3
4
PowerPAD is a trademark of Texas Instruments.
SPI is a trademark of Motorola, Inc.
All other trademarks are the property of their respective owners.
PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data and
other specifications are design goals. Texas Instruments reserves
the right to change or discontinue these products without notice.
Copyright © 2007, Texas Instruments Incorporated