Datasheet > ADP7118CP-EVALZ

ADP7118CP-EVALZ

更新时间： 2024-11-27 02:40:15

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
24页	915K
描述
20 V, 200 mA, Low Noise, CMOS LDO Linear Regulator

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ADP7118CP-EVALZ 数据手册

20 V, 200 mA, Low Noise,

CMOS LDO Linear Regulator

ADP7118

Data Sheet

FEATURES

TYPICAL APPLICATION CIRCUITS

Low noise: 11 µV rms independent of fixed output voltage

PSRR of 88 dB at 10 kHz, 68 dB at 100 kHz, 50 dB at 1 MHz,

ADP7118

= 6V

= 5V

OUT

VIN

VOUT

V_OUT≤ 5 V, V_IN= 7 V

OUT

2.2µF

Input voltage range: 2.7 V to 20 V

Maximum output current: 200 mA

Initial accuracy: 0.8%

Accuracy over line, load, and temperature

−1.2% to +1.5%, T_J= −40°C to +85°C

1.8%, T_J= −40°C to +125°C

SENSE/ADJ

GND

1nF

OFF

Figure 1. ADP7118 with Fixed Output Voltage, 5 V

Low dropout voltage: 200 mV (typical) at a 200 mA load,

ADP7118

= 7V

= 6V

V_OUT= 5 V

OUT

VIN

VOUT

User programmable soft start (LFCSP and SOIC only)

Low quiescent current, I_GND= 50 μA (typical) with no load

Low shutdown current: 1.8 μA at V_IN= 5 V, 3.0 μA at V_IN= 20 V

Stable with a small 2.2 µF ceramic output capacitor

Fixed output voltage options: 1.8 V, 2.5 V, 3.3 V, 4.5 V, and 5.0 V

16 standard voltages between 1.2 V and 5.0 V are available

Adjustable output from 1.2 V to V_IN– V_DO, output can be

adjusted above initial set point

OUT

2.2µF

2kΩ

2.2µF

SENSE/ADJ

10kΩ

GND

1nF

OFF

Figure 2. ADP7118 with 5 V Output Adjusted to 6 V

Precision enable

2 mm × 2 mm, 6-lead LFCSP, 8-Lead SOIC, 5-Lead TSOT

AEC-Q100 qualified for automotive applications

APPLICATIONS

Regulation to noise sensitive applications

ADC and DAC circuits, precision amplifiers, power for

VCO V_TUNEcontrol

Communications and infrastructure

Medical and healthcare

Industrial and instrumentation

Supported by ADIsimPower tool

GENERAL DESCRIPTION

The ADP7118 is a CMOS, low dropout (LDO) linear regulator

that operates from 2.7 V to 20 V and provides up to 200 mA of

output current. This high input voltage LDO is ideal for the

regulation of high performance analog and mixed-signal circuits

operating from 19 V down to 1.2 V rails. Using an advanced

proprietary architecture, the device provides high power supply

rejection, low noise, and achieves excellent line and load transient

response with a small 2.2 µF ceramic output capacitor. The

ADP7118 regulator output noise is 11 μV rms independent of

the output voltage for the fixed options of 5 V or less.

Additional voltages available by special order are 1.5 V, 1.85 V,

2.0 V, 2.2 V, 2.75 V, 2.8 V, 2.85 V, 3.8 V, 4.2 V, and 4.6 V.

Each fixed output voltage can be adjusted above the initial set

point with an external feedback divider. This allows the ADP7118

to provide an output voltage from 1.2 V to V_IN− V_DOwith high

PSRR and low noise.

User programmable soft start with an external capacitor is

available in the LFCSP and SOIC packages.

The ADP7118 is available in a 6-lead, 2 mm × 2 mm LFCSP

making it not only a very compact solution, but it also provides

excellent thermal performance for applications requiring up to

200 mA of output current in a small, low profile footprint. The

ADP7118 is also available in a 5-lead TSOT and an 8-lead SOIC.

The ADP7118 is available in 16 fixed output voltage options.

The following voltages are available from stock: 1.2 V

(adjustable), 1.8 V, 2.5 V, 3.3 V, 4.5 V, and 5.0 V.

Rev. F

Document Feedback

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumedby Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice.

No license is granted by implication or otherwise under any patent or patent rights of Analog

Devices. Trademarks and registeredtrademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Technical Support

www.analog.com

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