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ADM483EAR PDF预览

ADM483EAR

更新时间: 2024-09-30 22:23:55
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
12页 327K
描述
+-15 kV ESD Protected, EMC Compliant Slew Rate Limited, EIA RS-485 Transceiver

ADM483EAR 数据手册

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؎15 kV ESD Protected, EMC Compliant  
Slew Rate Limited, EIA RS-485 Transceiver  
a
ADM483E  
FUNCTIONAL BLOCK DIAGRAM  
FEATURES  
Robust RS-485 Transceiver  
15 kV ESD Protection Using HBM  
2 kV EFT Protection Meets IEC1000-4-4  
High EM Immunity Meets IEC1000-4-3  
Reduced Slew Rate for Low EM Interference  
250 kbps Data Rate  
Single +5 V ؎ 10% Supply  
–7 V to +12 V Bus Common-Mode Range  
12 kInput Impedance  
ADM483E  
RO  
R
B
A
RE  
DE  
DI  
D
Short Circuit Protection  
Excellent Noise Immunity  
36 A Supply Current  
0.1 A Shutdown Current  
APPLICATIONS  
Low Power RS-485 Systems  
Electrically Harsh Environments  
EMI Sensitive Applications  
DTE-DCE Interface  
Packet Switching  
Local Area Networks  
GENERAL DESCRIPTION  
The input impedance on the ADM483E is 12 k, allowing up  
The ADM483E is a robust, low power differential line trans-  
ceiver suitable for communication on multipoint bus transmis-  
sion lines. Internal protection against electrostatic discharge  
(ESD), electrical fast transient (EFT) and electromagnetic  
immunity (EMI) allows operation in electrically harsh environ-  
ments. ESD protection on the I-O lines meets ±15 kV when  
tested using the Human Body Model. EFT protection meets  
±2 kV in accordance with IEC1000-4-4, while EMI immunity is  
in excess of 10 V/m meeting IEC1000-4-3.  
to 32 transceivers on the bus.  
The ADM483E operates from a single +5 V ± 10% power sup-  
ply. Excessive power dissipation caused by bus contention or by  
output shorting is prevented by a thermal shutdown circuit. This  
feature forces the driver output into a high impedance state if,  
during fault conditions, a significant temperature increase is  
detected in the internal driver circuitry.  
The receiver contains a fail-safe feature that results in a logic  
high output state if the inputs are unconnected (floating).  
The level of unwanted emissions is also carefully controlled  
using slew limiting on the driver outputs. This reduces reflec-  
tions with improperly terminated cables and also minimizes  
electromagnetic interference. The controlled slew rate limits the  
data rate to 250 kbps.  
The ADM483E is fabricated on BiCMOS, an advanced mixed  
technology process combining low power CMOS with robust  
bipolar technology.  
It is fully specified over the industrial temperature range and is  
available in 8-lead DIP and SOIC packages.  
The ADM483E is intended for balanced data transmission and  
complies with both EIA Standards RS-485 and RS-422. It  
contains a differential line driver and a differential line receiver  
and is suitable for half duplex data transmission, as the driver  
and receiver share the same differential pins.  
REV. 0  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 617/329-4700  
Fax: 617/326-8703  
World Wide Web Site: http://www.analog.com  
© Analog Devices, Inc., 1997  

ADM483EAR 替代型号

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