Super Sequencer with Margining Control
and Nonvolatile Fault Recording
ADM1166
FUNCTIONAL BLOCK DIAGRAM
FEATURES
AUX1 AUX2
REFIN
REFOUT REFGND SDA SCL A1
A0
Complete supervisory and sequencing solution for up to
10 supplies
16 event deep black box nonvolatile fault recording
10 supply fault detectors enable supervision of supplies to
<0.5% accuracy at all voltages at 25°C
ADM1166
SMBus
INTERFACE
VREF
12-BIT
SAR ADC
EEPROM
<1.0% accuracy across all voltages and temperatures
5 selectable input attenuators allow supervision of supplies to
14.4 V on VH
CLOSED-LOOP
FAULT RECORDING
MARGINING SYSTEM
VX1
VX2
VX3
VX4
VX5
PDO1
PDO2
PDO3
PDO4
PDO5
PDO6
CONFIGURABLE
OUTPUT
DRIVERS
DUAL-
FUNCTION
INPUTS
6 V on VP1 to VP4 (VPx)
(LOGIC INPUTS
OR
(HV CAPABLE OF
DRIVING GATES
OF N-FET)
5 dual-function inputs, VX1 to VX5 (VXx)
High impedance input to supply fault detector with
thresholds between 0.573 V and 1.375 V
General-purpose logic input
10 programmable driver outputs, PDO1 to PDO10 (PDOx)
Open-collector with external pull-up
SFDs)
SEQUENCING
ENGINE
VP1
VP2
VP3
VP4
VH
PDO7
PDO8
PDO9
CONFIGURABLE
OUTPUT
DRIVERS
PROGRAMMABLE
RESET
GENERATORS
(LV CAPABLE
OF DRIVING
LOGIC SIGNALS)
(SFDs)
PDO10
Push/pull output, driven to VDDCAP or VPx
Open collector with weak pull-up to VDDCAP or VPx
Internally charge-pumped high drive for use with external
N-FET (PDO1 to PDO6 only)
AGND
PDOGND
VDDCAP
VDD
ARBITRATOR
VOUT VOUT VOUT VOUT VOUT VOUT
DAC DAC DAC DAC DAC DAC
DAC1 DAC2 DAC3 DAC4 DAC5 DAC6
VCCP GND
Sequencing engine (SE) implements state machine control of
PDO outputs
Figure 1.
State changes conditional on input events
Enables complex control of boards
Power-up and power-down sequence control
Fault event handling
APPLICATIONS
Central office systems
Servers/routers
Multivoltage system line cards
DSP/FPGA supply sequencing
In-circuit testing of margined supplies
Interrupt generation on warnings
Watchdog function can be integrated in SE
Program software control of sequencing through SMBus
Complete voltage-margining solution for 6 voltage rails
6 voltage output 8-bit DACs (0.300 V to 1.551 V) allow voltage
adjustment via dc-to-dc converter trim/feedback node
12-bit ADC for readback of all supervised voltages
2 auxiliary (single-ended) ADC inputs
Reference input (REFIN) has 2 input options
Driven directly from 2.048 V ( 0.25%) REFOUT pin
More accurate external reference for improved ADC
performance
Device powered by the highest of VPx, VH for improved
redundancy
User EEPROM: 256 bytes
Industry-standard 2-wire bus interface (SMBus)
Guaranteed PDO low with VH, VPx = 1.2 V
Available in 40-lead, 6 mm × 6 mm LFCSP and
48-lead, 7 mm × 7 mm TQFP packages
GENERAL DESCRIPTION
The ADM1166 Super Sequencer® is a configurable supervisory/
sequencing device that offers a single-chip solution for supply
monitoring and sequencing in multiple-supply systems. In addition
to these functions, the ADM1166 integrates a 12-bit ADC and
six 8-bit voltage output DACs. These circuits can be used to
implement a closed-loop margining system that enables supply
adjustment by altering either the feedback node or reference of
a dc-to-dc converter using the DAC outputs.
Supply margining can be performed with a minimum of external
components. The margining loop can be used for in-circuit testing
of a board during production (for example, to verify board func-
tionality at −5% of nominal supplies), or it can be used dynamically
to accurately control the output voltage of a dc-to-dc converter.
For more information about the ADM1166 register map,
refer to the AN-698 Application Note
Rev. 0
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