8-Channel/4-Channel
Fault-Protected Analog Multiplexers
ADG508F/ADG509F
FEATURES
FUNCTIONAL BLOCK DIAGRAMS
All switches off with power supply off
Analog output of on channel clamped within power
supplies if an overvoltage occurs
Latch-up proof construction
ADG508F
S1
Low on resistance (270 Ω typical)
Fast switching times
D
t
t
ON: 230 ns maximum
OFF: 130 ns maximum
Low power dissipation (3.3 mW maximum)
Fault and overvoltage protection (−40 V to +55 V)
Break-before-make construction
S8
1 OF 8
DECODER
TTL and CMOS compatible inputs
A0 A1 A2 EN
APPLICATIONS
Figure 1.
Existing multiplexer applications (both fault-protected and
nonfault-protected)
New designs requiring multiplexer functions
ADG509F
S1A
GENERAL DESCRIPTION
DA
S4A
The ADG508F and ADG509F are CMOS analog multi-
plexers, with the ADG508F comprising eight single channels
and the ADG509F comprising four differential channels. These
multiplexers provide fault protection. Using a series n-channel,
p-channel, n-channel MOSFET structure, both device and signal
source protection is provided in the event of an overvoltage or
power loss. The multiplexer can withstand continuous overvolt-
age inputs from −40 V to +55 V. During fault conditions with
power supplies off, the multiplexer input (or output) appears as
an open circuit and only a few nanoamperes of leakage current
will flow. This protects not only the multiplexer and the circuitry
driven by the multiplexer, but also protects the sensors or signal
sources that drive the multiplexer.
S1B
S4B
DB
1 OF 4
DECODER
A1
A0
EN
Figure 2.
PRODUCT HIGHLIGHTS
1. Fault protection. The ADG508F/ADG509F can withstand
continuous voltage inputs from −40 V to +55 V. When a
fault occurs due to the power supplies being turned off, all
the channels are turned off and only a leakage current of a
few nanoamperes flows.
The ADG508F switches one of eight inputs to a common output
as determined by the 3-bit binary address lines A0, A1, and A2.
The ADG509F switches one of four differential inputs to a
common differential output as determined by the 2-bit binary
address lines A0 and A1. An EN input on each device is used
to enable or disable the device. When disabled, all channels are
switched off.
2. On channel saturates while fault exists.
3. Low RON
.
4. Fast switching times.
5. Break-before-make switching. Switches are guaranteed
break-before-make so that input signals are protected
against momentary shorting.
6. Trench isolation eliminates latch-up. A dielectric trench
separates the p and n-channel MOSFETs thereby
preventing latch-up.
Rev. F
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