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ADG1408 PDF预览

ADG1408

更新时间: 2024-01-26 18:57:35
品牌 Logo 应用领域
亚德诺 - ADI 复用器
页数 文件大小 规格书
16页 820K
描述
5з ヌax Ron, 4-/8-Channel 【15V/12V/【5V Multiplexers

ADG1408 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:TSSOP
包装说明:TSSOP,针数:16
Reach Compliance Code:unknown风险等级:5.27
Is Samacsys:N模拟集成电路 - 其他类型:SINGLE-ENDED MULTIPLEXER
JESD-30 代码:R-PDSO-G16JESD-609代码:e3
长度:5 mm湿度敏感等级:1
负电源电压最大值(Vsup):-5.5 V负电源电压最小值(Vsup):-4.5 V
标称负供电电压 (Vsup):-5 V信道数量:8
功能数量:1端子数量:16
标称断态隔离度:70 dB通态电阻匹配规范:0.78 Ω
最大通态电阻 (Ron):9 Ω最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
座面最大高度:1.2 mm最大供电电压 (Vsup):5.5 V
最小供电电压 (Vsup):4.5 V标称供电电压 (Vsup):5 V
表面贴装:YES最长断开时间:285 ns
最长接通时间:330 ns技术:CMOS
温度等级:AUTOMOTIVE端子面层:MATTE TIN
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:40
宽度:4.4 mmBase Number Matches:1

ADG1408 数据手册

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5
Ω Μax Ron, 4-/8-Channel  
± ±5ꢀ/±1ꢀ/± 5ꢀ Vꢁluꢂtlexeꢃꢄ  
Pꢃelꢂmꢂnaꢃy Technꢂcal Daua  
ADG±408/ADG±409  
FEATURES  
FUNCTIONAL BLOCK DIAGRAMS  
5Max On Resistance  
0.5Max On Resistance Flatness  
33 V Supply Maximum Ratings  
Fully specified at ±±5V/±2V/±5V  
3V Logic Compatible Inputs  
Rail-to-Rail Operation  
ADG1408  
ADG1409  
S1  
S1A  
S4A  
DA  
DB  
D
Break-Before-Make Switching Action  
±6-Lead TSSOP Packages  
Typical Power Consumption (< 0.03 µW)  
S1B  
S4B  
S8  
APPLICATIONS  
Relay Replacement  
1 OF 4  
DECODER  
1 OF 8  
DECODER  
Audio and Video Routing  
Automatic Test Equipment  
Data Acquisition Systems  
Battery-Powered Systems  
Sample-and-Hold Systems  
Communication Systems  
A2 EN  
EN  
A1  
A0 A1  
A0  
SWITCHES SHOWN FOR A “1” LOGIC INPUT  
GENERAL DESCRIPTION  
PRODUCT HIGHLIGHTS  
The ADG1408 and ADG1409 are monolithic CMOS analog  
multiplexers comprising eight single channels and four  
differential channels, respectively. The ADG1408 switches one  
of eight inputs to a common output as determined by the 3-bit  
binary address lines A0, A1, and A2. The ADG1409 switches  
one of four differential inputs to a common differential output  
as determined by the 2-bit binary address lines A0 and A1. An  
EN input on both devices is used to enable or disable the device.  
When disabled, all channels are switched OFF.  
1. 5Max On Resistance  
2. 0.5Max On Resistance Flatness  
3. 3V Logic Compatible Digital Input  
VIH = 2.0V, VIL = 0.8V  
4. 16 Lead TSSOP package  
The ADG1408/ADG1409 are designed on an enhanced CMOS  
process that provides low power dissipation yet gives high  
switching speed and low on resistance. Each channel conducts  
equally well in both directions when ON and has an input  
signal range that extends to the supplies. In the OFF condition,  
signal levels up to the supplies are blocked. All channels exhibit  
break-before- make switching action, preventing momentary  
shorting when switching channels. Inherent in the design is low  
charge injection for minimum transients when switching the  
digital inputs.  
RevPrA  
Information furnished by Analog Devices is believed to be accurate and reliable.  
However, no responsibility is assumed by Analog Devices for its use, nor for any  
infringements of patents or other rights of third parties that may result from its use.  
Specifications subject to change without notice. No license is granted by implication  
or otherwise under any patent or patent rights of Analog Devices. Trademarks and  
registered trademarks are the property of their respective companies.  
One Technology Way, P.O. Box 9±06, Norwood, MA 02062-9±06, U.S.A.  
Tel: 78±.329.4700  
Fax: 78±.326.8703  
www.analog.com  
Analog Devices, Inc. All rights reserved.  
2004  

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