Data Sheet
ADFS7124-8
8-Channel, Low Noise, Low Power, 24-Bit, Sigma-Delta ADC with PGA and
Reference
► Matched programmable excitation currents
FEATURES
► Internal clock oscillator
► On-chip bias voltage generator
► Low-side power switch
► Functional safety approved to SC3 by TÜV Rheinland, File
Number 968/FSP 2188.01/23
► General-purpose outputs
► Multiple filter options
► Internal temperature sensor
► Self and system calibration
► Sensor burnout detection
► Automatic channel sequencer
► Per channel configuration
► Power supply: 2.7 V to 3.6 V and ±1.8 V
► Independent interface power supply
► Power-down current: 5 µA maximum
► Temperature range: −40°C to +125°C
► 32-lead LFCSP
► Three power modes
► RMS noise
► Low power: 24 nV rms at 1.17 SPS, gain = 128 (255 µA
typical)
► Mid power: 20 nV rms at 2.34 SPS, gain = 128 (355 µA
typical)
► Full power: 23 nV rms at 9.4 SPS, gain = 128 (930 µA typical)
► Up to 22 noise free bits in all power modes (gain = 1)
► Output data rate
► Full power: 9.38 SPS to 19,200 SPS
► Mid power: 2.34 SPS to 4800 SPS
► Low power: 1.17 SPS to 2400 SPS
► Rail-to-rail analog inputs for gains > 1
► Simultaneous 50 Hz/60 Hz rejection at 25 SPS (single cycle
settling)
► 3-wire or 4-wire serial interface
™
™
► SPI, QSPI , MICROWIRE , and DSP compatible
► Schmitt trigger on SCLK
► ESD: 4 kV
APPLICATIONS
► Diagnostic functions (which aid safe integrity level (SIL) certifica-
tion)
► Crosspoint multiplexed analog inputs
► 8 differential/15 pseudodifferential inputs
► Programmable gain (1 to 128)
► Temperature measurement
► Pressure measurement
► Industrial process control
► Instrumentation
► Band gap reference with 15 ppm/°C drift maximum (70 µA)
FUNCTIONAL BLOCK DIAGRAM
► Smart transmitters
Figure 1. Functional Block Diagram
Rev. 0
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