ADF5002

更新时间： 2024-11-19 06:36:19

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
12页	250K
描述
4GHz to 18GHz Divide-by-8 Prescaler

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数据手册

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ADF5002 数据手册

4 GHz to 18 GHz

Divide-by-8 Prescaler

ADF5002

FEATURES

FUNCTIONAL BLOCK DIAGRAM

Divide-by-8 prescaler

High frequency operation: 4 GHz to 18 GHz

Integrated RF decoupling capacitors

Low power consumption

ADF5002

BIAS

VDDx

100Ω

Active mode: 30 mA

1pF

Power-down mode: 7 mA

3pF

RFOUT

DIVIDE

BY 8

Low phase noise: −153 dBc/Hz

Single dc supply: 3.3 V compatible with ADF4xxx PLLs

Temperature range: −40°C to +105°C

Small package: 3 mm × 3 mm LFCSP

RFIN

1pF

50Ω

GND

APPLICATIONS

Figure 1.

PLL frequency range extender

Point-to-point radios

VSAT radios

Communications test equipment

GENERAL DESCRIPTION

The ADF5002 prescaler is a low noise, low power, fixed RF

divider block that can be used to divide down frequencies as

high as 18 GHz to a lower frequency suitable for input to a

PLL IC, such as the ADF4156 or the ADF4106. The ADF5002

provides a divide-by-8 function. The ADF5002 operates from

a 3.3 V supply and has differential 100 Ω RF outputs to allow

direct interface to the differential RF inputs of PLLs such as

the ADF4156 and ADF4106.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

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