Datasheet > ADF4116_15

ADF4116_15

更新时间： 2022-02-26 12:28:20

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亚德诺 - ADI		/
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28页	486K
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RF PLL Frequency Synthesizers

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ADF4116_15 数据手册

RF PLL Frequency Synthesizers

ADF4116/ADF4117/ADF4118

GENERAL DESCRIPTION

FEATURES

ADF4116: 550 MHz

ADF4117: 1.2 GHz

ADF4118: 3.0 GHz

The ADF411x family of frequency synthesizers can be used to

implement local oscillators (LO) in the upconversion and

downconversion sections of wireless receivers and transmitters.

They consist of a low noise digital phase frequency detector

(PFD), a precision charge pump, a programmable reference

divider, programmable A and B counters, and a dual-modulus

prescaler (P/P + 1). The A (5-bit) and B (13-bit) counters, in

conjunction with the dual-modulus prescaler (P/P + 1),

implement an N divider (N = BP + A). In addition, the 14-bit

reference counter (R counter) allows selectable REF_INfrequencies

at the PFD input. A complete phase-locked loop (PLL) can be

implemented if the synthesizer is used with an external loop

filter and voltage controlled oscillator (VCO).

2.7 V to 5.5 V power supply

Separate V_Pallows extended tuning voltage in 3 V systems

Y Grade: −40°C to +125°C

Dual-modulus prescaler

ADF4116: 8/9

ADF4117/ADF4118: 32/33

3-wire serial interface

Digital lock detect

Power-down mode

Fastlock mode

APPLICATIONS

All of the on-chip registers are controlled via a simple 3-wire

interface. The devices operate with a power supply ranging

from 2.7 V to 5.5 V and can be powered down when not in use.

Base stations for wireless radio

(GSM, PCS, DCS, CDMA, WCDMA)

Wireless handsets

(GSM, PCS, DCS, CDMA, WCDMA)

Wireless LANs

Communications test equipment

CATV equipment

FUNCTIONAL BLOCK DIAGRAM

CPGND

REFERENCE

ADF4116/ADF4117/ADF4118

14-BIT

R COUNTER

REF

PHASE

FREQUENCY

DETECTOR

CHARGE

PUMP

R COUNTER

LATCH

CLK

DATA

21-BIT

INPUT REGISTER

FUNCTION

LATCH

LOCK

DETECT

A, B COUNTER

LATCH

OUT

HIGH Z

FROM

FUNCTION LATCH

MUX

MUXOUT

N = BP + A

13-BIT

B COUNTER

OUT

LOAD

PRESCALER

P/P + 1

5-BIT

A COUNTER

M3 M2 M1

SWITCH

AGND

DGND

Figure 1.

Rev. D

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700 www.analog.com

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