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ADF41020 PDF预览

ADF41020

更新时间: 2024-11-05 12:23:55
品牌 Logo 应用领域
亚德诺 - ADI 振荡器发射机接收机无线
页数 文件大小 规格书
16页 352K
描述
The ADF41020 frequency synthesizer can be used to implement local oscillators as high as 18 GHz in the up conversion and down conversion sections of wireless receivers and transmitters.

ADF41020 数据手册

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18 GHz Microwave PLL Synthesizer  
Data Sheet  
ADF41020  
FEATURES  
GENERAL DESCRIPTION  
18 GHz maximum RF input frequency  
Integrated SiGe prescaler  
Software compatible with the ADF4106/ADF4107/ADF4108  
family of PLLs  
2.85 V to 3.15 V PLL power supply  
Programmable dual-modulus prescaler  
8/9, 16/17, 32/33, 64/65  
Programmable charge pump currents  
3-wire serial interface  
The ADF41020 frequency synthesizer can be used to implement  
local oscillators as high as 18 GHz in the up conversion and  
down conversion sections of wireless receivers and transmitters.  
It consists of a low noise, digital phase frequency detector  
(PFD), a precision charge pump, a programmable reference  
divider, and high frequency programmable feedback dividers  
(A, B, and P). A complete phase-locked loop (PLL) can be  
implemented if the synthesizer is used with an external loop  
filter and voltage controlled oscillator (VCO). The synthesizer  
can be used to drive external microwave VCOs via an active  
loop filter. Its very high bandwidth means a frequency doubler  
stage can be eliminated, simplifying system architecture and  
reducing cost. The ADF41020 is software-compatible with the  
existing ADF4106/ADF4107/ADF4108 family of devices from  
Analog Devices, Inc. Their pinouts match very closely with  
the exception of the ADF41020’s single-ended RF input pin,  
meaning only a minor layout change is required when updating  
current designs.  
Analog and digital lock detect  
Hardware and software power-down mode  
APPLICATIONS  
Microwave point-to-point/multipoint radios  
Wireless infrastructure  
VSAT radios  
Test equipment  
Instrumentation  
FUNCTIONAL BLOCK DIAGRAM  
AV  
DV  
V
R
SET  
DD  
DD  
P
GND  
REFERENCE  
PHASE  
FREQUENCY  
DETECTOR  
REF  
R COUNTER  
CHARGE  
PUMP  
IN  
CP  
R COUNTER  
LATCH  
LOCK  
DETECT  
CURRENT  
SETTING 1  
CURRENT  
SETTING 2  
CLK  
DATA  
LE  
24-BIT INPUT  
REGISTER  
FUNCTION  
LATCH  
CPI6 CPI5 CPI4  
HIGH-Z  
CPI3 CPI2 CPI1  
A, B COUNTER  
LATCH  
AV  
DD  
MUXOUT  
MUX  
N = 4(BP + A)  
SD  
OUT  
3pF  
A AND B  
COUNTERS  
DIVIDE  
BY 4  
RF  
IN  
P/P+ 1  
M3 M2 M1  
50Ω  
ADF41020  
GND  
CE  
GND  
Figure 1.  
Rev. 0  
Document Feedback  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rightsof third parties that may result fromits use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks andregisteredtrademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
Technical Support  
©2012 Analog Devices, Inc. All rights reserved.  
www.analog.com  
 
 
 
 
 

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