8-/10-Channel, Low Voltage,
a
Low Power, ⌺-⌬ ADCs
AD7708/AD7718
GENERAL DESCRIPTION
FEATURES
The AD7708/AD7718 are complete analog front-ends for low
frequency measurement applications. The AD7718 contains a
24-bit Σ-∆ ADC with PGA and can be configured as 4/5 fully-
differential input channels or 8/10 pseudo-differential input
channels. Two pins on the device are configurable as analog
inputs or reference inputs. The AD7708 is a 16-bit version of
the AD7718. Input signal ranges from 20 mV to 2.56 V can be
directly converted using these ADCs. Signals can be converted
directly from a transducer without the need for signal conditioning.
8-/10-Channel, High Resolution ⌺-⌬ ADCs
AD7708 Has 16-Bit Resolution
AD7718 Has 24-Bit Resolution
Factory-Calibrated
Single Conversion Cycle Setting
Programmable Gain Front End
Simultaneous 50 Hz and 60 Hz Rejection
VREF Select™ Allows Absolute and Ratiometric
Measurement Capability
Operation Can Be Optimized for
Analog Performance (CHOP = 0) or
Channel Throughput (CHOP = 1)
The device operates from a 32 kHz crystal with an on-board PLL
generating the required internal operating frequency. The output
data rate from the part is software programmable. The peak-to-
peak resolution from the part varies with the programmed gain
and output data rate.
INTERFACE
3-Wire Serial
SPITM, QSPITM, MICROWIRETM, and DSP-Compatible
Schmitt Trigger on SCLK
The part operates from a single 3 V or 5 V supply. When operating
from 3 V supplies, the power dissipation for the part is 3.84 mW typ.
Both parts are pin-for-pin compatible allowing an upgradable
path from 16 to 24 bits without the need for hardware modifica-
tions. The AD7708/AD7718 are housed in 28-lead SOIC and
TSSOP packages.
POWER
Specified for Single 3 V and 5 V Operation
Normal: 1.28 mA Typ @ 3 V
Power-Down: 30 A (32 kHz Crystal Running)
On-Chip Functions
Rail-to-Rail Input Buffer and PGA
2-Bit Digital I/O Port
APPLICATIONS
Industrial Process Control
Instrumentation
Pressure Transducers
Portable Instrumentation
Smart Transmitters
FUNCTIONAL BLOCK DIAGRAM
DVDD DGND
REFIN2(+)/AIN9
REFIN1(+) REFIN2(–)/AIN10 REFIN1(–) XTAL1 XTAL2
OSC
AND
PLL
AIN1
AIN2
AIN3
AIN4
AIN5
AIN6
AIN7
AIN8
POS BUF
DOUT
DIN
SCLK
CS
RDY
REFIN(+)
REFIN(–)
SERIAL
INTERFACE
AND
CONTROL
LOGIC
PGA
MUX
⌺-⌬ ADC*
NEG BUF
*AD7708 16-BIT ADC
*AD7718 24-BIT ADC
RESET
AVDD
AINCOM
I/O PORT
AD7708/AD7718
AVDD
AGND
P2
P1
SPI and QSPI are trademarks of Motorola Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
VREF Select is a trademark of Analog Devices, Inc.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© Analog Devices, Inc., 2001
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