Datasheet > ADC14C105CISQ/NOPB

ADC14C105CISQ/NOPB

更新时间： 2024-11-27 11:12:35

品牌	Logo	应用领域
德州仪器 - TI		电视转换器模数转换器
页数	文件大小	规格书
35页	931K
描述
14 位、105MSPS、1.0GHz 输入带宽模数转换器 (ADC) \| RTV \| 32 \| -40 to 85

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ADC14C105

www.ti.com

SNAS409C –MAY 2007–REVISED MARCH 2013

ADC14C105 14-Bit, 95/105 MSPS A/D Converter

Check for Samples: ADC14C105

FEATURES

DESCRIPTION

The ADC14C105 is

a high-performance CMOS

•

1 GHz Full Power Bandwidth

analog-to-digital converter capable of converting

analog input signals into 14-bit digital words at rates

up to 105 Mega Samples Per Second (MSPS). This

converter uses a differential, pipelined architecture

with digital error correction and an on-chip sample-

and-hold circuit to minimize power consumption and

the external component count, while providing

excellent dynamic performance. A unique sample-

and-hold stage yields a full-power bandwidth of 1

GHz. The ADC14C105 may be operated from a

single +3.0V or +3.3V power supply and consumes

low power.

Internal Reference and Sample-and-Hold

Circuit

•

Low Power Consumption

Data Ready Output Clock

Clock Duty Cycle Stabilizer

Single +3.0V or +3.3V Supply Operation

Power-Down Mode

32-pin WQFN Package, (5x5x0.8mm, 0.5mm

pin-pitch)

A separate +2.5V supply may be used for the digital

output interface which allows lower power operation

with reduced noise. A power-down feature reduces

the power consumption to very low levels while still

allowing fast wake-up time to full operation. The

differential inputs accept a 2V full scale differential

input swing. A stable 1.2V internal voltage reference

is provided, or the ADC14C105 can be operated with

an external 1.2V reference. Output data format (offset

binary versus 2's complement) and duty cycle

stabilizer are pin-selectable. The duty cycle stabilizer

maintains performance over a wide range of clock

duty cycles.

APPLICATIONS

•

High IF Sampling Receivers

Wireless Base Station Receivers

Test and Measurement Equipment

Communications Instrumentation

Portable Instrumentation

KEY SPECIFICATIONS

•

Resolution: 14 Bits

Conversion Rate: 105 MSPS

SNR (f_IN= 240 MHz): 71 dBFS (typ)

SFDR (f_IN= 240 MHz): 82 dBFS (typ)

Full Power Bandwidth: 1 GHz (typ)

Power Consumption

The ADC14C105 is available in a 32-lead WQFN

package and operates over the industrial temperature

range of −40°C to +85°C.

–

350 mW (typ, V_A=3.0V)

400 mW (typ, V_A=3.3V)

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...35

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ADC14C105CISQ/NOPB 替代型号

型号	品牌	替代类型	描述	数据表
ADC14C105CISQ	TI	完全替代	1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, QCC32, 5 X 5 MM, 0.80 MM HEIGHT, 0.50

与ADC14C105CISQ/NOPB相关器件

型号	品牌	获取价格	描述	数据表
ADC14C105CISQE	NSC	获取价格	14-Bit, 95/105 MSPS A/D Converter
ADC14C105CISQE/NOPB	TI	获取价格	14 位、105MSPS、1.0GHz 输入带宽模数转换器 (ADC) \| RTV \| 3
ADC14C105CISQX	TI	获取价格	IC,A/D CONVERTER,SINGLE,14-BIT,CMOS,LLCC,32PIN
ADC14C105EB	NSC	获取价格	14-Bit, 95/105 MSPS A/D Converter
ADC14DC080	NSC	获取价格	Dual 14-Bit, 80/105 MSPS A/D Converter with CMOS Outputs
ADC14DC080	TI	获取价格	双通道、14 位、80MSPS、1.0GHz 输入带宽模数转换器 (ADC)
ADC14DC080CISQ	NSC	获取价格	Dual 14-Bit, 80/105 MSPS A/D Converter with CMOS Outputs
ADC14DC080CISQ	TI	获取价格	2-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, QCC60, 9 X 9 MM, 0.80 MM HEIGHT, 0.50
ADC14DC080CISQ/NOPB	TI	获取价格	Dual 14-Bit, 80 MSPS A/D Converter with CMOS Outputs 60-WQFN -40 to 85
ADC14DC080CISQE	TI	获取价格	DUAL 1-CH 14-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, QCC60, 9 X 9 MM, 0.80 MM HEIGHT,

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