Datasheet > ADC1212D065HN/C1

ADC1212D065HN/C1

更新时间： 2024-11-19 19:31:59

品牌	Logo	应用领域
恩智浦 - NXP		转换器
页数	文件大小	规格书
42页	580K
描述
PROPRIETARY METHOD ADC, PQCC64, 9 X 9 MM, 0.85 MM HEIGHT, PLASTIC, SOT804-3, VQFN-64

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技术参数
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ADC1212D065HN/C1 技术参数

生命周期：	Transferred	零件包装代码：	QFN
包装说明：	,	针数：	64
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.57	转换器类型：	ADC, PROPRIETARY METHOD
JESD-30 代码：	S-PQCC-N64	端子数量：	64
输出位码：	OFFSET BINARY	封装主体材料：	PLASTIC/EPOXY
封装形状：	SQUARE	封装形式：	CHIP CARRIER
认证状态：	Not Qualified	表面贴装：	YES
端子形式：	NO LEAD	端子位置：	QUAD
Base Number Matches：	1

ADC1212D065HN/C1 数据手册

ADC1212D series

Dual 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps;

CMOS or LVDS DDR digital outputs

Rev. 2 — 4 March 2011

Product data sheet

1. General description

The ADC1212D is a dual channel 12-bit Analog-to-Digital Converter (ADC) optimized for

high dynamic performances and low power consumption at sample rates up to 125 Msps.

Pipelined architecture and output error correction ensure the ADC1212D is accurate

enough to guarantee zero missing codes over the entire operating range. Supplied from a

single 3 V source, it can handle output logic levels from 1.8 V to 3.3 V in

Complementary Metal Oxide Semiconductor (CMOS) mode, because of a separate digital

output supply. It supports the Low Voltage Differential Signalling (LVDS) Double Data Rate

(DDR) output standard. An integrated Serial Peripheral Interface (SPI) allows the user to

easily configure the ADC. The device also includes a programmable full-scale SPI to allow

a flexible input voltage range of 1 V (p-p) to 2 V (p-p). With excellent dynamic

performance from the baseband to input frequencies of 170 MHz or more, the ADC1212D

is ideal for use in communications, imaging and medical applications.

2. Features and benefits

 SNR, 70 dBFS

 Input bandwidth, 600 MHz

 SFDR, 86 dBc

 Power dissipation, 855 mW at 80 Msps

 Serial Peripheral Interface (SPI)

 Sample rate up to 125 Msps

 Clock input divided by 2 to reduce jitter  Duty cycle stabilizer

contribution

 Single 3 V supply

 Fast OuT-of-Range (OTR) detection

 Flexible input voltage range:

 Offset binary, two’s complement, gray

1 V to 2 V (p-p)

code

 CMOS or LVDS DDR digital outputs

 Power-down and Sleep modes

 HVQFN64 package

 Pin and software compatible with

ADC1412D series and ADC1112D125.

3. Applications

 Wireless and wired broadband

 Spectral analysis

communications

 Portable instrumentation

 Imaging systems

 Ultrasound equipment

 Software defined radio

12 3 4 5 6 7...42

中文翻译

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与ADC1212D065HN/C1相关器件

型号	品牌	获取价格	描述	数据表
ADC1212D065HN-C1	IDT	获取价格	Dual 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs
ADC1212D080HN	NXP	获取价格	Dual 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs
ADC1212D080HN/C1	NXP	获取价格	PROPRIETARY METHOD ADC, PQCC64, 9 X 9 MM, 0.85 MM HEIGHT, PLASTIC, SOT804-3, VQFN-64
ADC1212D080HN-C1	IDT	获取价格	Dual 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs
ADC1212D105HN	NXP	获取价格	Dual 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs
ADC1212D105HN/C1	IDT	获取价格	PROPRIETARY METHOD ADC, PQCC64, 9 X 9 MM, 0.85 MM HEIGHT, PLASTIC, SOT804-3, VQFN-64
ADC1212D105HN-C1	IDT	获取价格	Dual 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs
ADC1212D125HN	NXP	获取价格	Dual 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs
ADC1212D125HN/C1	IDT	获取价格	PROPRIETARY METHOD ADC, PQCC64, 9 X 9 MM, 0.85 MM HEIGHT, PLASTIC, SOT804-3, VQFN-64
ADC1212D125HN-C1	IDT	获取价格	Dual 12-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital outputs

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