Datasheet > ADC1112D125HN/C1

ADC1112D125HN/C1

更新时间： 2024-11-25 14:47:35

品牌	Logo	应用领域
艾迪悌 - IDT		转换器
页数	文件大小	规格书
37页	955K
描述
PROPRIETARY METHOD ADC, PQCC64, 9 X 9 MM, 0.85 MM HEIGHT, PLASTIC, SOT804-3, VQFN-64

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ADC1112D125HN/C1 技术参数

生命周期：	Obsolete	零件包装代码：	QFN
包装说明：	,	针数：	64
Reach Compliance Code：	unknown	风险等级：	5.7
转换器类型：	ADC, PROPRIETARY METHOD	JESD-30 代码：	S-PQCC-N64
端子数量：	64	输出位码：	OFFSET BINARY
封装主体材料：	PLASTIC/EPOXY	封装形状：	SQUARE
封装形式：	CHIP CARRIER	认证状态：	Not Qualified
表面贴装：	YES	端子形式：	NO LEAD
端子位置：	QUAD	Base Number Matches：	1

ADC1112D125HN/C1 数据手册

ADC1112D125

Dual 11-bit ADC; CMOS or LVDS DDR digital outputs

Rev. 01 — 6 August 2010

Preliminary data sheet

1. General description

The ADC1112D125 is a dual channel 11-bit Analog-to-Digital Converter (ADC) optimized

for high dynamic performance and low power consumption. Pipelined architecture and

output error correction ensure the ADC1112D125 is accurate enough to guarantee zero

missing codes over the entire operating range. Supplied from a single 3 V source, it can

handle output logic levels from 1.8 V to 3.3 V in Complementary Metal Oxide

Semiconductor (CMOS) mode, because of a separate digital output supply. It supports the

Low Voltage Differential Signalling (LVDS) Double Data Rate (DDR) output standard. An

integrated Serial Peripheral Interface (SPI) allows the user to easily configure the ADC.

The device also includes an SPI programmable full-scale to allow a flexible input voltage

range of 1 V to 2 V (peak-to-peak). With excellent dynamic performance from the

baseband to input frequencies of 170 MHz or more, the ADC1112D125 is ideal for use in

communications, imaging and medical applications.

2. Features and benefits

SNR, 68 dBFS

Input bandwidth, 600 MHz

Power dissipation, 1200 mW

Serial Peripheral Interface (SPI)

Duty cycle stabilizer

SFDR, 90 dBc

Sample rate up to 125 Msps

Clock input divider by 2 for less jitter

contribution

Single 3 V supply

Fast OuT-of-Range (OTR) detection

INL ± 0.12 LSB, DNL ± 0.06 LSB

Flexible input voltage range:

1 V to 2 V (p-p)

CMOS or LVDS DDR digital outputs

Offset binary, two’s complement, gray

code

Pin and software compatible with

ADC1412D series and ADC1212D

series.

Power-down and Sleep modes

HVQFN64 package

3. Applications

Wireless and wired broadband

Portable instrumentation

communications

Spectral analysis

Imaging systems

Ultrasound equipment

Software defined radio

12 3 4 5 6 7...37

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与ADC1112D125HN/C1相关器件

型号	品牌	获取价格	描述	数据表
ADC1112D125HN-C1	IDT	获取价格	Dual 11-bit ADC; CMOS or LVDS DDR digital outputs
ADC1113	ADI	获取价格	IC 2-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, DMA28, MODULE-28, Analog to
ADC1113D125	IDT	获取价格	Dual 11-bit ADC; serial JESD204A interface
ADC1113D125	NXP	获取价格	Dual 11-bit ADC; serial JESD204A interface
ADC1113D125_11	NXP	获取价格	Dual 11-bit ADC; serial JESD204A interface
ADC1113D125C1	NXP	获取价格	Dual 11-bit ADC; serial JESD204A interface
ADC1113D125HN/C1	NXP	获取价格	Dual 11-bit ADC; serial JESD204A interface
ADC1113D125HN/C1,5	IDT	获取价格	IC,A/D CONVERTER,DUAL,11-BIT,LLCC,56PIN
ADC1113D125HNC1	NXP	获取价格	Dual 11-bit ADC; serial JESD204A interface
ADC1113D125HN-C1	IDT	获取价格	Dual 11-bit ADC; serial JESD204A interface

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