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ADC10D020CIVS/NOPB PDF预览

ADC10D020CIVS/NOPB

更新时间： 2024-11-21 21:04:23
品牌 Logo 应用领域
美国国家半导体 - NSC 转换器
页数 文件大小 规格书
31页 1216K
描述
IC 2-CH 10-BIT RESISTANCE LADDER ADC, PARALLEL ACCESS, PQFP48, TQFP-48, Analog to Digital Converter

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ADC10D020CIVS/NOPB 技术参数

是否Rohs认证： 符合生命周期：Transferred
包装说明：TFQFP, TQFP48,.35SQReach Compliance Code：compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.22最大模拟输入电压：1.5 V
转换器类型：ADC, RESISTANCE LADDERJESD-30 代码：S-PQFP-G48
JESD-609代码：e3长度：7 mm
最大线性误差 (EL)：0.1758%湿度敏感等级：3
模拟输入通道数量：2位数：10
功能数量：1端子数量：48
最高工作温度：85 °C最低工作温度：-40 °C
输出位码：BINARY, 2'S COMPLEMENT BINARY输出格式：PARALLEL, WORD
封装主体材料：PLASTIC/EPOXY封装代码：TFQFP
封装等效代码：TQFP48,.35SQ封装形状：SQUARE
封装形式：FLATPACK, THIN PROFILE, FINE PITCH峰值回流温度（摄氏度）：260
电源：3/3.3 V认证状态：Not Qualified
采样速率：20 MHz采样并保持/跟踪并保持：SAMPLE
座面最大高度：1.2 mm子类别：Analog to Digital Converters
标称供电电压：3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Matte Tin (Sn)端子形式：GULL WING
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：40宽度：7 mm
Base Number Matches：1

ADC10D020CIVS/NOPB 数据手册

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February 2005  
ADC10D020  
Dual 10-Bit, 20 MSPS, 150 mW A/D Converter  
General Description  
Features  
n Internal sample-and-hold  
n Internal reference capability  
n Dual gain settings  
n Offset correction  
The ADC10D020 is a dual low power, high performance  
CMOS analog-to-digital converter that digitizes signals to 10  
bits resolution at sampling rates up to 30 MSPS while con-  
suming a typical 150 mW from a single 3.0V supply. No  
missing codes is guaranteed over the full operating tempera-  
ture range. The unique two stage architecture achieves 9.5  
Effective Bits over the entire Nyquist band at 20 MHz sample  
rate. An output formatting choice of offset binary or 2’s  
complement coding and a choice of two gain settings eases  
the interface to many systems. Also allowing great flexibility  
n Selectable offset binary or 2’s complement output  
n Multiplexed or parallel output bus  
n Single +2.7V to 3.6V operation  
n Power down and standby modes  
of use is a selectable 10-bit multiplexed or 20-bit parallel Key Specifications  
output mode. An offset correction feature minimizes the off-  
set error.  
n Resolution  
10 Bits  
20 MSPS  
n Conversion Rate  
n ENOB  
To ease interfacing to most low voltage systems, the digital  
output power pins of the ADC10D020 can be tied to a  
separate supply voltage of 1.5V to 3.6V, making the outputs  
compatible with other low voltage systems. When not con-  
verting, power consumption can be reduced by pulling the  
PD (Power Down) pin high, placing the converter into a low  
power state where it typically consumes less than 1 mW and  
from which recovery is less than 1 ms. Bringing the STBY  
(Standby) pin high places the converter into a standby mode  
where power consumption is about 27 mW and from which  
recovery is 800 ns.  
9.5 Bits (typ)  
0.35 LSB (typ)  
2.5 Clock Cycles  
2.5 Clock Cycles  
3 Clock Cycles  
90 dB  
n DNL  
n Conversion Latency Parallel Outputs  
— Multiplexed Outputs, I Data Bus  
— Multiplexed Outputs, Q Data Bus  
n PSRR  
n Power Consumption—Normal Operation 150 mW (typ)  
— Power Down Mode  
<
1 mW (typ)  
27 mW (typ)  
— Fast Recovery Standby Mode  
Applications  
n Digital Video  
n CCD Imaging  
The ADC10D020’s speed, resolution and single supply op-  
eration makes it well suited for a variety of applications,  
including high speed portable applications.  
Operating over the industrial (−40˚ ≤ TA ≤ +85˚C) tempera-  
ture range, the ADC10D020 is available in a 48-pin TQFP. An  
evaluation board is available to ease the design effort.  
n Portable Instrumentation  
n Communications  
n Medical Imaging  
n Ultrasound  
Connection Diagram  
20025501  
TOP VIEW  
© 2005 National Semiconductor Corporation  
DS200255  
www.national.com  
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