ADC10080CIMTX

更新时间： 2024-01-11 06:32:00

品牌	Logo	应用领域
美国国家半导体 - NSC		转换器模数转换器光电二极管
页数	文件大小	规格书
19页	924K
描述
10-Bit, 80 MSPS, 3V, 78.6 mW A/D Converter

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中文翻译

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技术参数
数据手册
替代型号

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ADC10080CIMTX 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
包装说明：	TSSOP, TSSOP28,.25	Reach Compliance Code：	unknown
风险等级：	5.92	最大模拟输入电压：	2 V
转换器类型：	A/D CONVERTER	JESD-30 代码：	R-PDSO-G28
最大线性误差 (EL)：	0.16%	位数：	10
功能数量：	1	端子数量：	28
最高工作温度：	85 °C	最低工作温度：	-40 °C
输出位码：	OFFSET BINARY, 2'S COMPLEMENT BINARY	封装主体材料：	PLASTIC/EPOXY
封装代码：	TSSOP	封装等效代码：	TSSOP28,.25
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
电源：	2.5,3 V	认证状态：	Not Qualified
子类别：	Analog to Digital Converters	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子形式：	GULL WING	端子节距：	0.635 mm
端子位置：	DUAL	Base Number Matches：	1

ADC10080CIMTX 数据手册

November 2004

ADC10080

10-Bit, 80 MSPS, 3V, 78.6 mW A/D Converter

General Description

Features

n Single +3.0V operation

The ADC10080 is a monolithic CMOS analog-to-digital con-

verter capable of converting analog input signals into 10-bit

digital words at 80 Megasamples per second (MSPS). This

converter uses a differential, pipeline architecture with digital

error correction and an on-chip sample-and-hold circuit to

provide a complete conversion solution, and to minimize

power consumption, while providing excellent dynamic per-

formance. A unique sample-and-hold stage yields a full-

power bandwidth of 400 MHz. Operating on a single 3.0V

power supply, this device consumes just 78.6 mW at

80 MSPS, including the reference current. The Standby

feature reduces power consumption to just 15 mW.

n Selectable 2.0 V_P-P, 1.5 V_P-P, or 1.0 V_P-Pfull-scale input

swing

n 400 MHz −3 dB input bandwidth

n Low power consumption

n Standby mode

n On-chip reference and sample-and-hold amplifier

n Offset binary or two’s complement data format

n Separate adjustable output driver supply to

accommodate 2.5V and 3.3V logic families

n 28-pin TSSOP package

The differential inputs provide a full scale selectable input

swing of 2.0 V_P-P, 1.5 V_P-P, 1.0 V_P-P, with the possibility of a

single-ended input. Full use of the differential input is recom-

mended for optimum performance. An internal +1.2V preci-

sion bandgap reference is used to set the ADC full-scale

range, and also allows the user to supply a buffered refer-

enced voltage for those applications requiring increased ac-

curacy. The output data format is 10-bit offset binary, or two’s

complement.

Key Specifications

n Resolution

10 Bits

80 MSPS

400 MHz

n Conversion Rate

n Full Power Bandwidth

n DNL

n SNR (f_IN= 10 MHz)

n SFDR (f_IN= 10 MHz)

n Data Latency

0.25 LSB (typ)

59.5 dB (typ)

−78.7 dB (typ)

6 Clock Cycles

+3.0V

This device is available in the 28-lead TSSOP package and

will operate over the industrial temperature range of −40˚C to

+85˚C.

n Supply Voltage

n Power Consumption, 80 MHz

78.6 mW

Applications

n Ultrasound and Imaging

n Instrumentation

n Cellular Based Stations/Communications Receivers

n Sonar/Radar

n xDSL

n Wireless Local Loops

n Data Acquisition Systems

n DSP Front Ends

Connection Diagram

20048501

DS200485

www.national.com

12 3 4 5 6 7...19

中文翻译

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ADC10080CIMTX 替代型号

型号	品牌	替代类型	描述	数据表
ADC10040QCIMT/NOPB	TI	功能相似	10 位 40MSPS 数模转换器 (ADC) - 符合汽车应用标准 \| PW \| 28
ADC10080CIMT	NSC	功能相似	10-Bit, 80 MSPS, 3V, 78.6 mW A/D Converter

与ADC10080CIMTX相关器件

型号	品牌	获取价格	描述	数据表
ADC10080CIMTX/NOPB	NSC	获取价格	IC 1-CH 10-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PDSO28, TSSOP-28, Analog to Digita
ADC10080CIMTX/NOPB	TI	获取价格	10 位、80MSPS 模数转换器 (ADC) \| PW \| 28 \| -40 to 85
ADC-100B	FARADAY	获取价格	VIDEO FRONT-END MODULES
ADC100C	ETC	获取价格	Precision 22 Bit Integrating A/D Converter
ADC100CA	ETC	获取价格	Precision 22 Bit Integrating A/D Converter
ADC100M	ETC	获取价格	Precision 22 Bit Integrating A/D Converter
ADC-100R	FARADAY	获取价格	VIDEO FRONT-END MODULES
ADC101	MPSIND	获取价格	1W, Miniature SIP, Single & Dual Output DC/DC Converters
ADC1010S	NXP	获取价格	Single 10-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital output
ADC1010S	IDT	获取价格	Single 10-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; CMOS or LVDS DDR digital output

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