2-Channel 500 MSPS DDS
with 10-Bit DACs
AD9958
FEATURES
APPLICATIONS
2 synchronized DDS channels @ 500 MSPS
Agile local oscillator
Independent frequency/phase/amplitude control between
channels
Phased array radar/sonar
Instrumentation
Matched latencies for frequency/phase/amplitude changes
Excellent channel-to-channel isolation (>72 dB)
Synchronized clocking
RF source for AOTF
Linear frequency/phase/amplitude sweeping capability
Up to 16 levels of frequency/phase/amplitude modulation
(pin-selectable)
Single-side band suppressed carrier
Quadrature communications
2 integrated 10-bit D/A converters (DACs)
Individually programmable DAC full-scale currents
32-bit frequency tuning resolution
14-bit phase offset resolution
10-bit output amplitude scaling resolution
Serial I/O Port (SPI) with 800Mbps data throughput
Software-/hardware-controlled power-down
Dual supply operation (1.8 V DDS core/3.3 V serial I/O)
Multiple device synchronization
Selectable 4× to 20× REF_CLK multiplier (PLL)
Selectable REF_CLK crystal oscillator
56-Lead LFCSP
FUNCTIONAL BLOCK DIAGRAM
AD9958
DDS CORE
COS(X)
IOUT
IOUT
Σ
Σ
Σ
Σ
DAC
DAC
32
32
32
32
15
10
10
10
10
DDS CORE
COS(X)
IOUT
IOUT
Σ
Σ
15
SCALABLE
DAC REF
CURRENT
DAC_RSET
32
PHASE/
∆PHASE
14
AMP/
∆AMP
10
FTW
∆FTW
SYNC_IN
SYNC_OUT
I/O_UPDATE
TIMING AND CONTROL LOGIC
PWR_DWN_CTL
MASTER_RESET
SYSTEM
CLK
CONTROL
REGISTERS
÷4
SYNC_CLK
SCLK
CS
REF CLOCK
MULTIPLIER
4× TO 20×
I/O
PORT
BUFFER
REF_CLK
REF_CLK
CHANNEL
MUX
SDIO_0
SDIO_1
SDIO_2
SDIO_3
REGISTE
RS
BUFFER/
XTAL
OSCILLATOR
PROFILE
REGISTERS
1.8V
1.8V
AVDD
DVDD
PS0 PS1 PS2 PS3
DVDD_I/O
CLK_MODE_SEL
Figure 1.
Rev. 0
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