Datasheet > AD9887AKSZ100

AD9887AKSZ100

更新时间： 2024-09-23 15:46:07

品牌	Logo	应用领域
亚德诺 - ADI		商用集成电路
页数	文件大小	规格书
40页	775K
描述
IC SPECIALTY CONSUMER CIRCUIT, PQFP160, LEAD FREE, PLASTIC, MS-022DD-1, MQFP-160, Consumer IC:Other

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中文翻译

获取价格

数据手册

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AD9887AKSZ100 数据手册

Dual Interface for

Flat Panel Displays

AD9887

FEATURES

FUNCTIONAL BLOCK DIAGRAM

Analog Interface

140 MSPS Maximum Conversion Rate

330 MHz Analog Bandwidth

0.5 V to 1.0 V Analog Input Range

500 ps p-p PLL Clock Jitter at 140 MSPS

3.3 V Power Supply

Full Sync Processing

Midscale Clamp

ANALOG

INTERFACE

REF

REFOUT

REFIN

OUTA

CLAMP

A/D

AIN

OUTB

OUTA

4:2:2 Output Format Mode

AIN

CLAMP

OUTB

Digital (DVI 1.0 Compatible) Interface

112 MHz Operation (1 Pixel/Clock Mode)

High Skew Tolerance of One Full Input Clock

Sync Detect for “Hot Plugging”

OUTA

AIN

OUTB

DATACK

HSOUT

APPLICATIONS

HSYNC

VSYNC

COAST

CLAMP

CKINV

CKEXT

FILT

RGB Graphics Processing

LCD Monitors and Projectors

Plasma Display Panels

Scan Converters

SYNC

VSOUT

PROCESSING

AND CLOCK

GENERATION

OUTA

SOGOUT

OUTB

CDT

OUTA

Micro Displays

Digital TV

OUTB

SCL

SDA

OUTA

SERIAL REGISTER

AND

OUTB

POWER MANAGEMENT

GENERAL DESCRIPTION

DATACK

HSOUT

VSOUT

SOGOUT

The AD9887 offers designers the flexibility of a dual analog and

digital interface for flat panel displays (FPDs) on a single chip.

Both interfaces are optimized for excellent image quality supporting

display resolutions up to SXGA (1280 × 1024 at 75 Hz). Either the

analog or the digital interface can be selected by the user.

DIGITAL

INTERFACE

OUTA

OUTB

Rx0+

Rx0–

Rx1+

Rx1–

Rx2+

Rx2–

RxC+

RxC–

OUTA

Analog Interface

For ease of design and to minimize cost, the AD9887 is a fully

integrated interface solution for FPDs. The AD9887 includes an

analog interface with a 140 MHz triple ADC with internal 1.25 V

reference, PLL to generate a pixel clock from HSYNC, program-

mable gain, offset, and clamp control. The user provides only a

3.3 V power supply, analog input, and HSYNC. Three-state

CMOS outputs may be powered from 2.5 V to 3.3 V.

OUTB

DVI

RECEIVER

OUTA

OUTB

DATACK

HSYNC

VSYNC

TERM

The AD9887’s on-chip PLL generates a pixel clock from HSYNC.

Pixel clock output frequencies range from 12 MHz to 140 MHz.

PLL clock jitter is 500 ps p-p typical at 140 MSPS. When a

COAST signal is presented, the PLL maintains its output fre-

quency in the absence of HSYNC. A sampling phase adjustment is

provided. Data, HSYNC and Clock output phase relationships are

maintained. The PLL can be disabled and an external clock input

provided as the pixel clock. The AD9887 also offers full sync pro-

cessing for composite sync and sync-on-green applications.

AD9887

Digital Interface

The AD9887 contains a Digital Video Interface (DVI 1.0) compat-

ible receiver. This receiver supports displays ranging from VGA

to SXGA (25 MHz to 112 MHz). The receiver operates with

true color (24-bit) panels in 1 or 2 pixel(s)/clock mode, and also

features an intrapair skew tolerance up to one full clock cycle.

A clamp signal is generated internally or may be provided by

the user through the CLAMP input pin. The analog interface

is fully programmable via a 2-wire serial interface.

Fabricated in an advanced CMOS process, the AD9887 is pro-

vided in a 160-lead MQFP surface mount plastic package and is

speciﬁed over the 0°C to 70°C temperature range.

REV. 0

Information furnished by Analog Devices is believed to be accurate and

reliable. However, no responsibility is assumed by Analog Devices for its

use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat

may result from its use. No license is granted by implication or otherwise

under any patent or patent rights of Analog Devices.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781/329-4700

Fax: 781/326-8703

www.analog.com

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与AD9887AKSZ100相关器件

型号	品牌	获取价格	描述	数据表
AD9887AKSZ-100	ROCHESTER	获取价格	SPECIALTY CONSUMER CIRCUIT, PQFP160, PLASTIC, ROHS COMPLIANT, MS-022DD-1, MQFP-160
AD9887AKSZ-100	ADI	获取价格	Dual Interface for Flat Panel Display
AD9887AKSZ-1001	ADI	获取价格	Dual Interface for Flat Panel Display
AD9887AKSZ140	ADI	获取价格	IC SPECIALTY CONSUMER CIRCUIT, PQFP160, LEAD FREE, PLASTIC, MS-022DD-1, MQFP-160, Consumer
AD9887AKSZ-140	ROCHESTER	获取价格	SPECIALTY CONSUMER CIRCUIT, PQFP160, PLASTIC, ROHS COMPLIANT, MS-022DD-1, MQFP-160
AD9887AKSZ-140	ADI	获取价格	Dual Interface for Flat Panel Display
AD9887AKSZ-1401	ADI	获取价格	Dual Interface for Flat Panel Display
AD9887AKSZ170	ADI	获取价格	IC SPECIALTY CONSUMER CIRCUIT, PQFP160, LEAD FREE, PLASTIC, MS-022DD-1, MQFP-160, Consumer
AD9887AKSZ-170	ROCHESTER	获取价格	SPECIALTY CONSUMER CIRCUIT, PQFP160, PLASTIC, ROHS COMPLIANT, MS-022DD-1, MQFP-160
AD9887AKSZ-170	ADI	获取价格	Dual Interface for Flat Panel Display

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