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AD9876

更新时间: 2024-11-08 22:50:03
品牌 Logo 应用领域
亚德诺 - ADI 调制解调器
页数 文件大小 规格书
24页 487K
描述
Broadband Modem Mixed-Signal Front End

AD9876 数据手册

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Broadband Modem  
Mixed-Signal Front End  
a
A
AD9876  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
Low Cost 3.3 V CMOS Mixed-Signal Front End (MxFE™)  
Converter for Broadband Modems  
10-/12-Bit D/A Converter (TxDAC+®)  
64/32 MSPS Input Word Rate  
2/4Interpolating LPF or BPF Transmit Filter  
128 MSPS DAC Output Update Rate  
Wide (26 MHz) Transmit Bandwidth  
Power-Down Mode  
10-/12-Bit 50 MSPS A/D Converter  
Fourth Order Low-Pass Filter 12 MHz or 26 MHz  
with Bypass  
–6 dB to +36 dB Programmable Gain Amplifier  
Internal Clock Multiplier (PLL)  
Clock Outputs  
PWR DN  
AD9876  
Tx QUIET  
12  
12  
GAIN  
Tx [5:0]  
Tx SYNC  
Tx+  
Tx–  
Tx  
MUX  
Kx INTERPOLATION  
LPF/BPF  
TxDAC+  
PLL-A  
L  
V
REF  
GATE  
FB  
CLK-A  
CLK-B  
CLOCK GEN  
VRC  
OSCIN  
PLL-B  
M/N  
XTAL  
Rx SYNC  
Voltage Regulator Controller  
48-Lead LQFP Package  
Rx+  
Rx–  
Rx  
MUX  
PGA  
PGA  
Rx [5:0]  
SPORT  
LPF  
ADC  
12  
APPLICATIONS  
Powerline Networking  
Home Phone Networking  
xDSL  
3
REGISTER  
CONTROL  
Broadband Wireless  
Home RF  
PRODUCT DESCRIPTION  
path LPF cutoff frequency can be programmed to either 12 MHz  
or 26 MHz. The filter cutoff frequency can also be tuned or  
bypassed where filter requirements differ. The 12-bit ADC uses  
a multistage differential pipeline architecture to achieve excellent  
dynamic performance with low power consumption.  
The AD9876 is a single-supply broadband modem mixed-signal  
front end (MxFE) IC. The device contains a transmit path  
interpolation filter and DAC and a receive path PGA, LPF, and  
ADC supporting a variety of broadband modem applications.  
Also on-chip is a PLL clock multiplier that provides all required  
clocks from a single crystal or clock input. The AD9876 provides  
12-bit converter performance on both the Tx and Rx path.  
The AD9876 provides a voltage regulator controller (VRC) that  
can be used with an external power MOSFET transistor to form  
a cost-effective 1.3 V linear regulator.  
The TxDAC+ uses a selectable digital 2× or 4× interpolation  
low-pass or band-pass filter to further oversample transmit data  
and reduce the complexity of analog reconstruction filtering.  
The transmit path signal bandwidth can be as high as 26 MHz  
at an input data rate of 64 MSPS. The 12-bit DAC provides  
differential current outputs for optimum noise and distortion  
performance. The DAC full-scale current can be adjusted from  
2 to 20 mA by a single resistor, providing 20 dB of additional  
gain range.  
The digital transmit and receive ports are each multiplexed to a  
bus width of six bits and are clocked at a frequency of twice the  
12-bit word rate.  
The AD9876 ADC and/or DAC can also be used at sampling  
rates as high as 64 MSPS in a 6-bit resolution nonmulti-  
plexed mode.  
The AD9876 is pin compatible with the 10-bit AD9875. Both are  
available in a space-saving 48-lead LQFP package. They are speci-  
fied over the industrial (–40°C to +85°C) temperature range.  
The receive path consists of a PGA, LPF, and ADC. The PGA has  
a gain range of –6 dB to +36 dB, programmable in 2 dB steps,  
adding 42 dB of dynamic range to the receive path. The receive  
MxFE is a trademark of Analog Devices, Inc.  
TxDAC+ is a registered trademark of Analog Devices, Inc.  
REV. A  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat  
may result from its use. No license is granted by implication or otherwise  
under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
2
www.analog.com  
Fax: 781/326-8703  
© Analog Devices, Inc., 2002  

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