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AD9875-EB

更新时间: 2024-11-08 22:50:03
品牌 Logo 应用领域
亚德诺 - ADI 调制解调器
页数 文件大小 规格书
24页 286K
描述
Broadband Modem Mixed-Signal Front End

AD9875-EB 数据手册

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Broadband Modem  
Mixed-Signal Front End  
a
AD9875  
FUNCTIO NAL BLO CK D IAGRAM  
FEATURES  
Low Cost 3.3 V-CMOS Mixed-Signal Front End (MxFE™  
Converter for Broadband Modems  
10-/12-Bit D/A Converter (TxDAC+®)  
64/32 MSPS Input Word Rate  
2/4Interpolating LPF or BPF Transmit Filter  
128 MSPS DAC Output Update Rate  
Wide (26 MHz) Transmit Bandwidth  
Power-Down Mode  
10-/12-Bit, 50 MSPS A/D Converter  
Fourth Order Low-Pass Filter 12 MHz or 26 MHz  
with Bypass  
–6 dB to +36 dB Programmable Gain Amplifier  
Internal Clock Multiplier (PLL)  
Clock Outputs  
)
PWR DN  
AD9875  
Tx QUIET  
10  
10  
GAIN  
Tx [5:0]  
Tx SYNC  
Tx+  
Tx–  
Tx  
MUX  
Kx INTERPOLATION  
LPF/BPF  
TxDAC+  
PLL-A  
L  
V
REF  
GATE  
FB  
CLK-A  
CLK-B  
CLOCK GEN  
VRC  
OSCIN  
PLL-B  
M/N  
XTAL  
Rx SYNC  
Voltage Regulator Controller  
48-Lead LQFP Package  
Rx+  
Rx–  
Rx  
MUX  
PGA  
PGA  
Rx [5:0]  
SPORT  
LPF  
ADC  
10  
APPLICATIONS  
Powerline Networking  
Home Phone Networking  
xDSL  
3
REGISTER  
CONTROL  
Broadband Wireless  
Home RF  
P RO D UCT D ESCRIP TIO N  
The receive path LPF cutoff frequency can be programmed to either  
12 MHz or 26 MHz. The filter cutoff frequency can also be tuned  
or bypassed where filter requirements differ. The 10-bit ADC uses  
a multistage differential pipeline architecture to achieve excellent  
dynamic performance with low power consumption.  
T he AD9875 is a single supply Broadband modem mixed-  
signal front end (MxFE) IC. T he devices contain a transmit  
path Interpolation Filter and DAC, and a receive path PGA,  
LPF and ADC supporting a variety of Broadband modem  
applications. Also on-chip is a PLL clock multiplier that pro-  
vides all required clocks from a single crystal or clock input.  
T he AD9875 provides 10-bit converter performance on both  
the T x and Rx paths.  
T he AD9875 provides a voltage regulator controller (VRC) that  
can be used with an external power MOSFET transistor to form  
a cost-effective 1.3 V linear regulator.  
T he digital transmit and receive ports are each multiplexed to a  
bus width of 5/6 bits and are clocked at a frequency of twice the  
10-bit word rate.  
T he T xDAC+ uses a selectable digital 2× or 4× interpolation  
low-pass or band-pass filter to further oversample transmit  
data and reduce the complexity of analog reconstruction filtering.  
T he transmit path signal bandwidth can be as high as 26 M H z  
at an input data rate of 64 M SPS. T he 10-bit D AC provides  
differential current outputs for optimum noise and distortion  
performance. T he D AC full-scale current can be adjusted  
from 2 mA to 20 mA by a single resistor, providing 20 dB of  
additional gain range.  
T he AD9875 ADC and/or DAC can also be used at higher  
sampling rates as high as 64 MSPS in a 5-bit resolution non-  
multiplexed mode.  
The AD9875 is pin-compatible with the 12-bit AD9876. Both are  
available in a space-saving 48-lead LQFP package. They are speci-  
fied over the industrial (–40°C to +85°C) temperature range.  
The receive path consists of a PGA, LPF, and ADC. The two-stage  
PGA has a gain range of –6 dB to +36 dB, and is programmable  
in 2 dB steps, adding 42 dB of dynamic range to the receive path.  
MxFE is a trademark of Analog Devices, Inc.  
T xDAC+ is a registered trademark of Analog Devices, Inc.  
REV. 0  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat  
may result from its use. No license is granted by implication or otherwise  
under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
www.analog.com  
© Analog Devices, Inc., 2001  

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