Datasheet > AD9863BCP-50

AD9863BCP-50

更新时间： 2024-11-07 04:04:23

品牌	Logo	应用领域
亚德诺 - ADI		电信集成电路
页数	文件大小	规格书
40页	1330K
描述
Mixed-Signal Front-End (MxFE⑩) Baseband Transceiver for Broadband Applications

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AD9863BCP-50 数据手册

Mixed-Signal Front-End (MxFE^™) Baseband

Transceiver for Broadband Applications

AD9863

FEATURES

FUNCTIONAL BLOCK DIAGRAM

Receive path includes dual 12-bit, 50 MSPS analog-to-digital

converters with internal or external reference

Transmit path includes dual 12-bit, 200 MSPS digital-to-

analog converters with 1×, 2×, or 4× interpolation and

programmable gain control

VIN+A

ADC

DATA

MUX

AND

Rx DATA

VIN–A

VIN+B

LATCH

VIN–B

I/O

INTERFACE

CONTROL

I/O

Internal clock distribution block includes a programmable

phase-locked loop and timing generation circuitry,

allowing single-reference clock operation

INTERFACE

CONFIGURATION

BLOCK

FLEXIBLE

I/O BUS

[0:23]

LOW-PASS

INTERPOLATION

FILTER

IOUT+A

DATA

LATCH

AND

24-pin flexible I/O data interface allows various interleaved

or noninterleaved data transfers in half-duplex mode and

interleaved data transfers in full-duplex mode

DAC

IOUT–A

IOUT+B

Tx DATA

DEMUX

IOUT–B

Configurable through register programmability or

optionally limited programmability through mode pins

Independent Rx and Tx power-down control pins

64-lead LFCSP package (9 mm × 9 mm footprint)

ADC CLOCK

DAC CLOCK

CLKIN1

CLKIN2

CLOCK

GENERATION

BLOCK

PLL

AD9863

APPLICATIONS

Broadband access

Figure 1.

Broadband LAN

Communications (modems)

GENERAL DESCRIPTION

The AD9863 is a member of the MxFE family—a group of

integrated converters for the communications market. The

AD9863 integrates dual 12-bit analog-to-digital converters

(ADC) and dual 12-bit digital-to-analog converters (TxDAC®).

The AD9863 ADCs are optimized for ADC sampling of 50 MSPS

and less. The dual TxDACs operate at speeds up to 200 MHz

and include a bypassable 2× or 4× interpolation filter. The

AD9863 is optimized for high performance, low power, and

small form factor to provide a cost-effective solution for the

broadband communications market.

In half-duplex systems, the interface supports 24-bit parallel

transfers or 12-bit interleaved transfers. In full-duplex systems,

the interface supports a 12-bit interleaved ADC bus and a

12-bit interleaved TxDAC bus. The flexible I/O bus reduces pin

count, also reducing the required package size on the AD9863

and the device to which it connects.

The AD9863 can use either mode pins or a serial programma-

ble interface (SPI) to configure the interface bus, operate the

ADC in a low power mode, configure the TxDAC interpolation

rate, and control ADC and TxDAC power-down. The SPI

provides more programmable options for both the TxDAC path

(for example, coarse and fine gain control and offset control for

channel matching) and the ADC path (for example, the internal

duty cycle stabilizer and twos complement data format).

The AD9863 uses a single input clock pin (CLKIN) or two

independent clocks for the Tx path and the Rx path. The ADC

and TxDAC clocks are generated within a timing generation

block that provides user programmable options such as divide

circuits, PLL multipliers, and switches.

The AD9863 is packaged in a 64-lead LFCSP (low profile, fine

pitched, chip scale package). The 64-lead LFCSP footprint is

only 9 mm × 9 mm and is less than 0.9 mm high, fitting into

such tightly spaced applications as PCMCIA cards.

A flexible, bidirectional 24-bit I/O bus accommodates a variety

of custom digital back ends or open market DSPs.

Rev. A

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

www.analog.com

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AD9863BCP-50 替代型号

型号	品牌	替代类型	描述	数据表
AD9863BCPRL-50	ADI	类似代替	Mixed-Signal Front-End (MxFE⑩) Baseband Trans
AD9863BCPZ-50	ADI	功能相似	Mixed-Signal Front-End (MxFE™) Baseband Transceiver for Broadband Applications

与AD9863BCP-50相关器件

型号	品牌	获取价格	描述	数据表
AD9863BCPRL-50	ADI	获取价格	Mixed-Signal Front-End (MxFE⑩) Baseband Trans
AD9863BCPZ-50	ADI	获取价格	Mixed-Signal Front-End (MxFE™) Baseband Transceiver for Broadband Applications
AD9863BCPZ-501	ADI	获取价格	Mixed-Signal Front-End (MxFE⑩) Baseband Trans
AD9863BCPZRL-50	ROCHESTER	获取价格	SPECIALTY TELECOM CIRCUIT, QCC64, 9 X 9 MM, LEAD FREE, MO-220-VMMD, LFCSP-64
AD9863BCPZRL-501	ADI	获取价格	Mixed-Signal Front-End (MxFE⑩) Baseband Trans
AD9864	ADI	获取价格	IF Digitizing Subsystem
AD9864_17	ADI	获取价格	IF Digitizing Subsystem
AD9864BCPZ	ADI	获取价格	IF Digitizing Subsystem
AD9864BCPZRL	ADI	获取价格	IF Digitizing Subsystem
AD9864-EB	ADI	获取价格	IF Digitizing Subsystem

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