Mixed-Signal Front-End (MxFE™) Processor
for Broadband Communications
a
AD9860/AD9862*
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Mixed-Signal Front-End Processor with Dual Converter
Receive and Dual Converter Transmit Signal Paths
Receive Signal Path Includes:
Two 10-/12-Bit, 64 MSPS Sampling A/D Converters
with Internal or External Independent References,
Input Buffers, Programmable Gain Amplifiers,
Low-Pass Decimation Filters, and a Digital Hilbert Filter
Transmit Signal Path Includes:
VIN+A
VIN–A
PGA
PGA
ADC
RxA DATA
[0:11]
1x
1x
BYPASSABLE LOW-PASS
DECIMATION FILTER
HILBERT
FILTER
VIN+B
VIN–B
ADC
RxB DATA
[0:11]
LOGIC LOW
SIGDELT
ꢀ-ꢁ
AD9860/AD9862
Two 12-/14-Bit, 128 MSPS D/A Converters with
Programmable Full-Scale Output Current, Channel
Independent Fine Gain and Offset Control, Digital
Hilbert and Interpolation Filters, and Digitally Tunable
Real or Complex Up-Converters
Delay-Locked Loop Clock Multiplier and Integrated
Timing Generation Circuitry Allow for Single Crystal
or Clock Operation
Programmable Output Clocks, Serial Programmable
Interface, Programmable Sigma-Delta, Three Auxiliary
DAC Outputs and Two Auxiliary ADCs with Dual
Multiplexed Inputs
SPI
SPI REGISTERS
AUX_DAC_A
AUX_DAC_B
AUX_DAC_C
AUX DAC
AUX DAC
AUX DAC
INTERFACE
Rx PATH
TIMING
CLOCK
DISTRIBUTION
BLOCK
OSC1
OSC2
DLL
1ꢂ, 2ꢂ, 4ꢂ
Tx PATH
TIMING
AUX_ADC_A1
AUX_ADC_A2
AUX ADC
AUX_ADC_B1
AUX_ADC_B2
CLKOUT1
CLKOUT2
AUX ADC
BYPASSABLE BYPASSABLE
DIGITAL DIGITAL
QUADRATURE QUADRATURE
MIXER MIXER
IOUT+A
IOUT–A
PGA
PGA
DAC
DAC
Tx DATA
[0:13]
HILBERT
FILTER
IOUT+B
IOUT–B
APPLICATIONS
Broadband Wireless Systems
Fixed Wireless, WLAN, MMDS, LMDS
Broadband Wireline Systems
Cable Modems, VDSL, PowerPlug
Digital Communications
BYPASSABLE
FS/4
FS/8
LOW-PASS
INTERPOLATION
FILTER
NCO
Set-Top Boxes, Data Modems
range for both channels. The output data bus can be multi-
plexed to accommodate a variety of interface types.
GENERAL DESCRIPTION
The AD9860/AD9862 transmit path (Tx) consists of two chan-
nels that contain high performance, 12-/14-bit, 128 MSPS
digital-to-analog converters (DAC), programmable gain amplifiers
(TxPGA), interpolation filters, a Hilbert filter, and digital mixers
for complex or real signal frequency modulation. The Tx latch
and demultiplexer circuitry can process real or I/Q data. Interpo-
lation rates of 2ꢀ and 4ꢀ are available to ease requirements on
an external reconstruction filter. For single channel systems, the
digital Hilbert filter can be used with an external quadrature
modulator to create an image rejection architecture. The two
12-/14-bit, high performance DACs produce an output signal
that can be scaled over a 20 dB range by the TxPGA.
The AD9860 and AD9862 (AD9860/AD9862) are versatile
integrated mixed-signal front-ends (MxFE) that are optimized
for broadband communication markets. The AD9860/AD9862
are cost effective, mixed signal solutions for wireless or wireline
standards based or proprietary broadband modem systems where
dynamic performance, power dissipation, cost, and size are all
critical attributes. The AD9860 has 10-bit ADCs and 12-bit DACs;
the AD9862 has 12-bit ADCs and 14-bit DACs.
The AD9860/AD9862 receive path (Rx) consists of two channels
that each include a high performance, 10-/12-bit, 64 MSPS analog-
to-digital converter (ADC), input buffer, Programmable Gain
Amplifier (RxPGA), digital Hilbert filter, and decimation filter. The
Rx can be used to receive real, diversity, or I/Q data at baseband or
low IF. The input buffers provide a constant input impedance for
both channels to ease impedance matching with external com-
ponents (e.g., SAW filter). The RxPGA provides a 20 dB gain
A programmable delay-locked loop (DLL) clock multiplier and
integrated timing circuits enable the use of a single external
reference clock or an external crystal to generate clocking for all
internal blocks and also provides two external clock outputs.
Additional features include a programmable sigma-delta output,
four auxiliary ADC inputs and three auxiliary DAC outputs.
Device programmability is facilitated by a serial port interface
(SPI) combined with a register bank. The AD9860/AD9862 is
available in a space saving 128-lead LQFP.
*Protected by U.S.Patent No. 5,969,657; other patents pending.
MxFE is a trademark of Analog Devices, Inc.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© Analog Devices, Inc., 2002
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