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AD9763ASTZRL

更新时间: 2024-11-13 12:27:19
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亚德诺 - ADI 转换器数模转换器
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描述
10-/12-/14-Bit, 125 MSPS Dual TxDAC Digital-to-Analog Converters

AD9763ASTZRL 数据手册

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10-/12-/14-Bit, 125 MSPS  
Dual TxDAC+ Digital-to-Analog Converters  
AD9763/AD9765/AD9767  
Data Sheet  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
DVDD1/ DCOM1/  
DVDD2 DCOM2 AVDD ACOM  
10-/12-/14-bit dual transmit digital-to-analog converters (DACs)  
125 MSPS update rate  
CLK1  
I
I
OUTA1  
1
1
Excellent SFDR to Nyquist @ 5 MHz output: 75 dBc  
Excellent gain and offset matching: 0.1%  
Fully independent or single-resistor gain control  
Dual-port or interleaved data  
PORT1  
LATCH  
DAC  
OUTB1  
REFIO  
FSADJ1  
FSADJ2  
GAINCTRL  
REFERENCE  
WRT1/IQWRT  
WRT2/IQSEL  
AD9763/  
DIGITAL  
INTERFACE  
AD9765/  
On-chip 1.2 V reference  
5 V or 3.3 V operation  
AD9767  
BIAS  
GENERATOR  
SLEEP  
I
Power dissipation: 380 mW @ 5 V  
Power-down mode: 50 mW @ 5 V  
48-lead LQFP  
OUTA2  
2
2
PORT2  
LATCH  
DAC  
I
OUTB2  
MODE  
CLK2/IQ RESET  
Figure 1.  
APPLICATIONS  
Communications  
Base stations  
Digital synthesis  
Quadrature modulation  
3D ultrasound  
The DACs utilize a segmented current source architecture  
combined with a proprietary switching technique to reduce  
glitch energy and maximize dynamic accuracy. Each DAC provides  
differential current output, thus supporting single-ended or dif-  
ferential applications. Both DACs of the AD9763, AD9765, or  
AD9767 can be simultaneously updated and can provide a  
nominal full-scale current of 20 mA. The full-scale currents  
between each DAC are matched to within 0.1%.  
GENERAL DESCRIPTION  
The AD9763/AD9765/AD9767 are dual-port, high speed,  
2-channel, 10-/12-/14-bit CMOS DACs. Each part integrates  
two high quality TxDAC+® cores, a voltage reference, and digital  
interface circuitry into a small 48-lead LQFP. The AD9763/  
AD9765/AD9767 offer exceptional ac and dc performance  
while supporting update rates of up to 125 MSPS.  
The AD9763/AD9765/AD9767 are manufactured on an  
advanced, low cost CMOS process. They operate from a single  
supply of 3.3 V to 5 V and consume 380 mW of power.  
PRODUCT HIGHLIGHTS  
The AD9763/AD9765/AD9767 have been optimized for  
processing I and Q data in communications applications. The  
digital interface consists of two double-buffered latches as well  
as control logic. Separate write inputs allow data to be written to  
the two DAC ports independent of one another. Separate clocks  
control the update rate of the DACs.  
1. The AD9763/AD9765/AD9767 are members of a pin-  
compatible family of dual TxDACs providing 8-, 10-, 12-,  
and 14-bit resolution.  
2. Dual 10-/12-/14-Bit, 125 MSPS DACs. A pair of high  
performance DACs for each part is optimized for low  
distortion performance and provides flexible transmission  
of I and Q information.  
3. Matching. Gain matching is typically 0.1% of full scale, and  
offset error is better than 0.02%.  
4. Low Power. Complete CMOS dual DAC function operates on  
380 mW from a 3.3 V to 5 V single supply. The DAC full-scale  
current can be reduced for lower power operation, and a sleep  
mode is provided for low power idle periods.  
5. On-Chip Voltage Reference. The AD9763/AD9765/AD9767  
each include a 1.20 V temperature-compensated band gap  
voltage reference.  
6. Dual 10-/12-/14-Bit Inputs. The AD9763/AD9765/AD9767  
each feature a flexible dual-port interface, allowing dual or  
interleaved input data.  
A mode control pin allows the AD9763/AD9765/AD9767 to  
interface to two separate data ports, or to a single interleaved  
high speed data port. In interleaving mode, the input data  
stream is demuxed into its original I and Q data and then  
latched. The I and Q data is then converted by the two DACs  
and updated at half the input data rate.  
The GAINCTRL pin allows two modes for setting the full-scale  
current (IOUTFS) of the two DACs. IOUTFS for each DAC can be set  
independently using two external resistors, or IOUTFS for both  
DACs can be set by using a single external resistor. See the  
Gain Control Mode section for important date code  
information on this feature.  
Rev. G  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
www.analog.com  
Fax: 781.461.3113 ©1999-2011 Analog Devices, Inc. All rights reserved.  
 

AD9763ASTZRL 替代型号

型号 品牌 替代类型 描述 数据表
AD9763ASTZ ADI

完全替代

10-/12-/14-Bit, 125 MSPS Dual TxDAC Digital-to-Analog Converters
AD9763AST ADI

完全替代

10-Bit, 125 MSPS Dual TxDAC+ D/A Converter

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