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AD9644BCPZ-155 PDF预览

AD9644BCPZ-155

更新时间: 2024-11-19 20:36:31
品牌 Logo 应用领域
亚德诺 - ADI 转换器
页数 文件大小 规格书
45页 1510K
描述
14-Bit, 80 MSPS/155 MSPS, 1.8V Dual, Serial Output A/D Converter

AD9644BCPZ-155 数据手册

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14-Bit, 80 MSPS/155 MSPS, 1.8 V Dual  
Serial Output Analog-to-Digital Converter (ADC)  
Data Sheet  
AD9644  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
AVDD  
AGND  
DRVDD  
DRGND  
JESD204A coded serial digital outputs  
SNR = 73.7 dBFS at 70 MHz and 80 MSPS  
SNR = 71.7 dBFS at 70 MHz and 155 MSPS  
SFDR = 92 dBc at 70 MHz and 80 MSPS  
SFDR = 92 dBc at 70 MHz and 155 MSPS  
Low power: 423 mW at 80 MSPS, 567 mW at 155 MSPS  
1.8 V supply operation  
AD9644  
DOUT+A  
DOUT–A  
VIN+A  
14  
PIPELINE  
14-BIT ADC  
DSYNC+A  
DSYNC–A  
VIN–A  
VCMA  
DOUT+B  
DOUT–B  
14  
VIN+B  
VIN–B  
VCMB  
PIPELINE  
14-BIT ADC  
Integer 1-to-8 input clock divider  
IF sampling frequencies to 250 MHz  
DSYNC+B  
DSYNC–B  
−148.6 dBFS/Hz input noise at 180 MHz and 80 MSPS  
−150.3 dBFS/Hz input noise at 180 MHz and 155 MSPS  
Programmable internal ADC voltage reference  
Flexible analog input range: 1.4 V p-p to 2.1 V p-p  
ADC clock duty cycle stabilizer  
REFERENCE  
PLL  
SERIAL PORT  
1 TO 8  
CLOCK  
DIVIDER  
PDWN  
(SPI)  
Serial port control  
User-configurable, built-in self-test (BIST) capability  
Energy-saving power-down modes  
SCLK SDIO CSB  
CLK+ CLK– SYNC  
Figure 1. 48-Lead 7 mm × 7 mm LFCSP  
APPLICATIONS  
Communications  
PRODUCT HIGHLIGHTS  
Diversity radio systems  
1. An on-chip PLL allows users to provide a single ADC  
sampling clock; the PLL multiplies the ADC sampling  
clock to produce the corresponding JESD204A data rate  
clock.  
2. The configurable JESD204A output block supports up to  
1.6 Gbps per channel data rate when using a dedicated  
data link per ADC or 3.2 Gbps data rate when using a  
single shared data link for both ADCs.  
3. Proprietary differential input that maintains excellent SNR  
performance for input frequencies up to 250 MHz.  
4. Operation from a single 1.8 V power supply.  
5. Standard serial port interface (SPI) that supports various  
product features and functions, such as data formatting  
(offset binary, twos complement, or gray coding),  
controlling the clock DCS, power-down, test modes,  
voltage reference mode, and serial output configuration.  
Multimode digital receivers (3G and 4G)  
GSM, EDGE, W-CDMA, LTE,  
CDMA2000, WiMAX, TD-SCDMA  
I/Q demodulation systems  
Smart antenna systems  
General-purpose software radios  
Broadband data applications  
Ultrasound equipment  
Rev. C  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
www.analog.com  
Fax: 781.461.3113 ©2010–2012 Analog Devices, Inc. All rights reserved.  
 
 
 
 

AD9644BCPZ-155 替代型号

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