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AD9640ABCPZRL7-80 PDF预览

AD9640ABCPZRL7-80

更新时间: 2024-09-23 12:32:59
品牌 Logo 应用领域
亚德诺 - ADI 转换器模数转换器
页数 文件大小 规格书
52页 1235K
描述
14-Bit, 80/105/125/150 MSPS, 1.8 V Dual Analog-to-Digital Converter

AD9640ABCPZRL7-80 数据手册

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14-Bit, 80/105/125/150 MSPS, 1.8 V  
Dual Analog-to-Digital Converter  
AD9640  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
SDIO/SCLK/  
SNR = 71.8 dBc (72.8 dBFS) to 70 MHz @ 125 MSPS  
SFDR = 85 dBc to 70 MHz @ 125 MSPS  
Low power: 750 mW @ 125 MSPS  
SNR = 71.6 dBc (72.6 dBFS) to 70 MHz @ 150 MSPS  
SFDR = 84 dBc to 70 MHz @ 150 MSPS  
Low power: 820 mW @ 150 MSPS  
1.8 V analog supply operation  
1.8 V to 3.3V CMOS output supply or 1.8 V LVDS  
output supply  
Integer 1 to 8 input clock divider  
IF sampling frequencies to 450 MHz  
Internal ADC voltage reference  
AVDD DVDD  
FD(0:3)A  
DCS DFS CSB DRVDD  
FD BITS/THRESHOLD  
DETECT  
SPI  
D13A  
D0A  
PROGRAMMING DATA  
VIN+A  
VIN–A  
SHA  
ADC  
SIGNAL  
MONITOR  
CLK+  
VREF  
CLK–  
SENSE  
DIVIDE  
DCOA  
1 TO 8  
DCO  
GENERATION  
CML  
REF  
SELECT  
DCOB  
D13B  
DUTY CYCLE  
STABILIZER  
RBIAS  
Integrated ADC sample-and-hold inputs  
Flexible analog input range: 1 V p-p to 2 V p-p  
Differential analog inputs with 650 MHz bandwidth  
ADC clock duty cycle stabilizer  
D0B  
VIN–B  
VIN+B  
SHA  
ADC  
SIGNAL MONITOR  
DATA  
95 dB channel isolation/crosstalk  
Serial port control  
MULTICHIP  
SYNC  
FD BITS/THRESHOLD  
DETECT  
SIGNAL MONITOR  
INTERFACE  
User-configurable, built-in self-test (BIST) capability  
Energy-saving power-down modes  
Integrated receive features  
AGND SYNC  
FD(0:3)B  
SMI  
SMI  
SMI DRGND  
SDFS SCLK/ SDO/  
PDWN OEB  
Fast detect/threshold bits  
Figure 1.  
Composite signal monitor  
PRODUCT HIGHLIGHTS  
APPLICATIONS  
Communications  
1. Integrated dual 14-bit, 80/105/125/150 MSPS ADC.  
2. Fast overrange detect and signal monitor with serial output.  
3. Signal monitor block with dedicated serial output mode.  
4. Proprietary differential input that maintains excellent SNR  
performance for input frequencies up to 450 MHz.  
5. Operation from a single 1.8 V supply and a separate digital  
output driver supply to accommodate 1.8 V to 3.3 V logic  
families.  
6. A standard serial port interface that supports various  
product features and functions, such as data formatting  
(offset binary, twos complement, or gray coding), enabling  
the clock DCS, power-down, and voltage reference mode.  
7. Pin compatibility with the AD9627, AD9627-11, and the  
AD9600 for a simple migration from 14 bits to 12 bits, 11  
bits, or 10 bits.  
Diversity radio systems  
Multimode digital receivers  
GSM, EDGE, WCDMA, LTE,  
CDMA2000, WiMAX, TD-SCDMA  
I/Q demodulation systems  
Smart antenna systems  
General-purpose software radios  
Broadband data applications  
Rev. B  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
www.analog.com  
Fax: 781.461.3113 ©2007–2009 Analog Devices, Inc. All rights reserved.  
 
 
 

AD9640ABCPZRL7-80 替代型号

型号 品牌 替代类型 描述 数据表
AD9640ABCPZ-125 ADI

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14-Bit, 80/105/125/150 MSPS, 1.8 V Dual Analog-to-Digital Converter
AD9640ABCPZ-105 ADI

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14-Bit, 80/105/125/150 MSPS, 1.8 V Dual Analog-to-Digital Converter
AD9600ABCPZ-105 ADI

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10-Bit, 105 MSPS/125 MSPS/150 MSPS

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