45 dB Digitally Controlled VGA
LF to 600 MHz
AD8369*
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Digitally Controlled Variable Gain in 3 dB Steps
–5 dB to +40 dB (RL = 1 k⍀)
BIT3 BIT2 BIT1 BIT0
–10 dB to +35 dB (RL = 200 ⍀)
Less than 0.2 dB Flatness over a +20 MHz Bandwidth
up to 380 MHz
4-Bit Parallel or 3-Wire Serial Interface
Differential 200 ⍀ Input and Output Impedance
Single 3.0 V–5.5 V Supply
VPOS
BIAS
3dB STEP
DENB
SENB
PWUP
GAIN CODE DECODE
Gm CELLS
FILT
OPHI
OPLO
Draws 37 mA at 5 V
Power-Down <1 mA Maximum
APPLICATIONS
INHI
Cellular/PCS Base Stations
IF Sampling Receivers
Fixed Wireless Access
Wireline Modems
CMDC
COMM
INLO
Instrumentation
COMM
PRODUCT DESCRIPTION
OPHI and OPLO. The overall gain depends upon the source
and load impedances due to the resistive nature of the input and
output ports.
The AD8369 is a high performance digitally controlled variable
gain amplifier (VGA) for use from low frequencies to a –3 dB
frequency of 600 MHz at all gain codes. The AD8369 delivers
excellent distortion performance: the two-tone, third-order
intermodulation distortion is –69 dBc at 70 MHz for a 1 V p-p
composite output into a 1 kW load. The AD8369 has a nominal
noise figure of 7 dB when at maximum gain, then increases with
decreasing gain. Output IP3 is +19.5 dBm at 70 MHz into a
1 kW load and remains fairly constant over the gain range.
Digital control of the AD8369 is achieved using either a serial or
a parallel interface. The mode of digital control is selected by
connecting a single pin (SENB) to ground or the positive sup-
ply. Digital control pins can be driven with standard CMOS
logic levels.
The AD8369 may be powered on or off by a logic level applied
to the PWUP pin. For a logic high, the chip powers up rapidly
to its nominal quiescent current of 37 mA at 25ºC. When low,
the total dissipation drops to less than a few milliwatts.
The signal input is applied to pins INHI and INLO. Variable gain
is achieved via two methods. The 6 dB gain steps are implemented
using a discrete X-AMP® structure, in which the input signal is
progressively attenuated by a 200 W R-2R ladder network that
also sets the input impedance; the 3 dB steps are implemented at
the output of the amplifier. This combination provides very
accurate 3 dB gain steps over a span of 45 dB. The output imped-
ance is set by on-chip resistors across the differential output pins,
The AD8369 is fabricated on an Analog Devices proprietary, high
performance 25 GHz silicon bipolar IC process and is available
in a 16-lead TSSOP package for the industrial temperature range
of –40∞C to +85∞C. A populated evaluation board is available.
*Patents Pending
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
www.analog.com
© 2002 Analog Devices, Inc. All rights reserved.
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