High Output Power
Programmable CATV Line Driver
a
AD8326
FEATURES
FUNCTIO NAL BLO CK D IAGRAM
Supports DOCSIS Standard for Reverse Path
Transmission
V
CC
(7 PINS)
BYP
Gain Programmable in 0.75 dB Steps over a 53.5 dB Range
Low Distortion at 65 dBmV Output
–62 dBc SFDR at 21 MHz
–58 dBc SFDR at 65 MHz
1 dB Compression of 25 dBm at 10 MHz
Output Noise Level
AD8326
V
V
V
V
IN+
OUT+
DIFF OR
SINGLE
INPUT
AMP
POWER
AMP
ATTENUATION
CORE
VERNIER
IN–
OUT–
Z
DIFF =
OUT
75⍀
8
DECODE
–45 dBmV in 160 kHz
Z
Z
(SINGLE) = 800⍀
(DIFF) = 1.6k⍀
IN
IN
8
POWER-DOWN
LOGIC
Maintains 75 ⍀ Output Impedance
Power-Up and Power-Down Condition
Upper Bandwidth: 100 MHz (Full Gain Range)
Single or Dual Supply Operation
DATA LATCH
8
SHIFT
REGISTER
APPLICATIONS
Gain-Programmable Line Driver
CATV Telephony Modems
TXEN
GND
DATEN DATA CLK
V
EE
(10 PINS)
SLEEP
CATV Terminal Devices
General-Purpose Digitally Controlled Variable Gain Block
–40
–45
–50
–55
–60
–65
–70
–75
–80
ARP(V = +12V)
S
ARE(V = ؎5V)
S
ARP(V = 69dBmV)
O
ARP(V = 67dBmV)
O
GENERAL D ESCRIP TIO N
The AD8326 is a high-output power, digitally controlled, vari-
able gain amplifier optimized for coaxial line driving applications
such as data and telephony cable modems that are designed to
the MCNS-DOCSIS upstream standard. An 8-bit serial word
determines the desired output gain over a 53.5 dB range result-
ing in gain changes of 0.75 dB/LSB. The AD8326 is offered in
two models, each optimized to support the desired output power
and resulting performance.
ARE(V = 65dBmV)
O
ARE(V = 62dBmV)
O
5
15
25
35
45
55
65
FREQUENCY – MHz
The AD8326 comprises a digitally controlled variable attenuator
of 0 dB to –54 dB, that is preceded by a low noise, fixed-gain
buffer and is followed by a low distortion high-power amplifier.
The AD8326 accepts a differential or single-ended input signal.
The output is designed to drive a 75 Ω load, such as coaxial
cable, although the AD8326 is capable of driving other loads.
Figure 1. Worst Harmonic Distortion vs. Frequency
The differential output of the AD8326 is compliant with DOCSIS
paragraph 4.2.10.2 for “Spurious Emissions During Burst On/Off
Transients.” In addition, this device has a sleep mode function
that reduces the quiescent current to 4 mA.
When driving 67 dBm into a 75 Ω load, the AD8326ARP
provides a worst harmonic of only –59 dBc at 21 MHz and
–57 dBc at 42 MHz. When driving 65 dBmV into a 75 Ω load,
the AD8326ARE provides a worst harmonic of only –62 dBc at
21 MHz and –60 dBc at 42 MHz.
The AD8326 is packaged in a low-cost 28-lead TSSOP and a
28-lead P (power) SOIC. Both devices have an operational tem-
perature range of –40°C to +85°C.
REV. 0
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reliable. However, no responsibility is assumed by Analog Devices for its
use, norforanyinfringementsofpatentsorotherrightsofthirdpartiesthat
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
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© Analog Devices, Inc., 2001