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AD8195 PDF预览

AD8195

更新时间: 2023-12-20 18:45:19
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
20页 1033K
描述
AD8195:具有均衡特性的1:1 HDMI/DVI缓冲器

AD8195 数据手册

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HDMI/DVI Buffer with Equalization  
Data Sheet  
AD8195  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
1 input, 1 output HDMI/DVI link  
Enables HDMI 1.3a-compliant front panel input  
4 TMDS channels per link  
PARALLEL  
AVCC  
Supports 250 Mbps to 2.25 Gbps data rates  
Supports 25 MHz to 225 MHz pixel clocks  
Equalized inputs for operation with long HDMI cables  
(20 m at 2.25 Gbps)  
Preemphasized outputs  
Fully buffered unidirectional inputs/outputs  
50 Ω on-chip terminations  
AD8195  
AMUXVCC  
VTTI  
AVEE  
CONTROL  
LOGIC  
VTTO  
+
4
4
4
4
+
IP[3:0]  
IN[3:0]  
OP[3:0]  
ON[3:0]  
BUFFER  
EQ  
PE  
HIGH SPEED  
BUFFERED  
VREF_IN  
VREF_OUT  
Low added jitter  
SCL_IN  
SDA_IN  
SCL_OUT  
SDA_OUT  
Transmitter disable feature  
2
2
Reduces power dissipation  
Disables input termination  
CEC_IN  
CEC_OUT  
3 auxiliary buffered channels per link  
Bidirectional buffered DDC lines (SDA and SCL)  
Bidirectional buffered CEC line with integrated pull-up  
resistors (27 kΩ)  
LOW SPEED BUFFERED  
BIDIRECTIONAL  
Independently powered from 5 V of HDMI input  
connector  
Figure 1.  
Logic level translation (3.3 V, 5 V)  
Input/output capacitance isolation  
Standards compatible: HDMI, DVI, HDCP, DDC, CEC  
40-lead LFCSP_VQ package (6 mm × 6 mm)  
TYPICAL APPLICATION  
HDTV SET  
MEDIA CENTER  
SET-TOP BOX  
DVD PLAYER  
GAME  
CONSOLE  
HDMI  
RECEIVER  
APPLICATIONS  
Front panel buffer for advanced television (HDTV) sets  
4:1 HDMI  
SWITCH  
AD8195  
GENERAL DESCRIPTION  
BACK PANEL  
CONNECTORS  
FRONT PANEL  
CONNECTOR  
The AD8195 is an HDMI/DVI buffer featuring equalized TMDS  
inputs and preemphasized TMDS outputs, ideal for systems with  
long cable runs. The AD8195 includes bidirectional buffering  
for the DDC bus and bidirectional buffering with integrated  
pull-up resistors for the CEC bus. The DDC and CEC buffers  
are powered independently of the TMDS buffers so that DDC/  
CEC functionality can be maintained when the system is powered  
off. The AD8195 meets all the requirements for sink tests as  
defined in Section 8 of the HDMI Compliance Test 1.3c.  
Figure 2. Typical AD8195 Application for HDTV Sets  
PRODUCT HIGHLIGHTS  
1. Enables a fully HDMI 1.3a-compliant front panel input.  
2. Supports data rates of up to 2.25 Gbps, enabling 1080p deep  
color (12-bit color) HDMI formats and greater than UXGA  
(1600 × 1200) DVI resolutions.  
3. Input cable equalizer enables use of long cables; more than  
20 meters (24 AWG) at data rates of up to 2.25 Gbps.  
4. Auxiliary buffer isolates and buffers the DDC bus and CEC  
line for a single chip, fully HDMI 1.3a-compliant solution.  
5. Auxiliary buffer is powered independently from the TMDS  
link so that DDC/CEC functionality can be maintained  
when the system is powered off.  
The AD8195 is specified to operate over the −40°C to +85°C  
temperature range.  
Rev. B  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registered trademarks are the property of their respective owners.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781.329.4700  
www.analog.com  
Fax: 781.461.3113 ©2008–2012 Analog Devices, Inc. All rights reserved.  
 
 
 
 
 
 

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