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AD8192

更新时间: 2024-11-26 04:30:59
品牌 Logo 应用领域
亚德诺 - ADI 开关
页数 文件大小 规格书
28页 984K
描述
2:1 HDMI/DVI Switch with Equalization and DDC/CEC Buffers

AD8192 数据手册

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2:1 HDMI/DVI Switch with  
Equalization and DDC/CEC Buffers  
AD8192  
FEATURES  
FUNCTIONAL ꢀLOCK DIAGRAM  
RESET  
2 inputs, 1 output HDMI/DVI links  
HDMI 1.3a receive and transmit compliant  
±± kV HꢀM ESD on HDMI input pins  
SERIAL INTERFACE  
AD8192  
AVCC  
I2C_SDA  
I2C_SCL  
I2C_ADDR  
DVCC  
CONFIG  
INTERFACE  
CONTROL  
LOGIC  
AMUXVCC  
AVEE  
DVEE  
4 TMDS channels per link  
VREF_AB  
VREF_COM  
Supports 250 Mbps to 2.25 Gbps data rates and beyond  
Supports 25 MHz to 225 MHz pixel clocks and beyond  
Fully buffered unidirectional inputs/outputs  
Switchable 50 Ω on-chip input terminations with  
programmable or automatic control on channel switch  
Equalized inputs and pre-emphasized outputs  
Low added jitter  
VTTI  
VTTO  
+
4
4
IP_A[3:0]  
IN_A[3:0]  
+
4
OP[3:0]  
ON[3:0]  
SWITCH  
CORE  
4
EQ  
PE  
+
4
IP_B[3:0]  
IN_B[3:0]  
4
HIGH SPEED  
BUFFERED  
VTTI  
Output disable feature for reduced power dissipation  
Switched output termination for building of larger arrays  
ꢀidirectional and cascadable DDC buffers (SDA/SCL)  
DDC bus logic level translation (3.3 V, 5 V)  
ꢀidirectional and cascadable CEC buffer with integrated  
pull-up resistors (2± kΩ)  
Hot plug detect pulse low on channel switch  
Standards compatible: DVI, HDMI 1.3a, HDCP, I2C  
Serial (I2C slave) control interface  
2
2
DDC_A[1:0]  
DDC_B[1:0]  
SWITCH  
CORE  
2
DDC_COM[1:0]  
CEC_O/I  
CEC_I/O  
BUFFERED  
LOW SPEED  
HPD_A  
HPD_B  
BIDIRECTIONAL  
DVEE  
Figure 1.  
56-lead, 8 mm × 8 mm LFCSP, RoHS-compliant package  
TYPICAL APPLICATION  
HDTV SET  
APPLICATIONS  
HDMI  
Front panel buffer for advanced television (HDTV) sets  
Standalone HDMI switcher  
Multiple input displays  
Projectors  
RECEIVER  
SET-TOP BOX  
DVD PLAYER  
AD8192  
A/V receivers  
Set-top boxes  
Figure 2. Typical Application for HDTV Sets  
GENERAL DESCRIPTION  
PRODUCT HIGHLIGHTS  
The AD8192 is a complete HDMI™/DVI link switch featuring  
equalized TMDS inputs and pre-emphasized TMDS outputs  
ideal for systems with long cable runs. The TMDS outputs can  
be set to a high impedance state to reduce the power dissipation  
and/or allow the construction of larger arrays using the wire-  
OR technique. The AD8192 includes bidirectional buffering for  
the DDC bus and CEC line, with integrated pull-up resistors for  
the CEC line. The AD8192 is available in a space-saving, 56-lead  
LFCSP surface-mount, lead-free plastic package specified to  
operate over the −40°C to +85°C temperature range.  
1. Fully HDMI 1.3a transmit and receive compliant.  
2. Supports data rates up to 2.25 Gbps, enabling greater than  
1080p HDMI formats with deep color (12-bit) and UXGA  
(1600 × 1200) DVI resolutions.  
3. Input cable equalizer enables use of long cables; more than  
20 m (24 AWG) at data rates up to 2.25 Gbps.  
4. Auxiliary switch isolates and buffers the DDC bus and the  
CEC line, improving total system capacitance limit.  
5. Hot plug detect (HPD) signal is pulsed low on link switch.  
6. Manually or automatically switched input terminations.  
Rev. 0  
Information furnished by Analog Devices is believed to be accurate and reliable. However, no  
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other  
rights of third parties that may result from its use. Specifications subject to change without notice. No  
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.  
Trademarks and registeredtrademarks arethe property of their respective owners.  
One Technology Way, P.O. ꢀox 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: ±81.329.4±00  
Fax: ±81.461.3113  
www.analog.com  
©2008 Analog Devices, Inc. All rights reserved.  
 

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