a
Asynchronous Digital Crosspoint Switch
AD8152*
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Low Cost
Low Power
VCC
2.0 W @ 2.5 V (Outputs Enabled)
<100 mW @ 2.5 V (Outputs Disabled)
34 ؋
34, Fully Differential, Nonblocking Array
3.2 Gbps per Port NRZ Data Rate
Wide Power Supply Range: 2.5 V to 3.3 V
LVTTL or LVCMOS Level Control Inputs:
@ 2.5 V to 3.3 V
34
34
34
34
INP
OUTP
VTTO
DIFFERENTIAL
SWITCH MATRIX
OUTPUT
LEVEL
DACs
VTTI
OUTN
INN
Low Jitter: 45 ps
MATRIX
CONNECTION
LATCHES
CONNECTION
DECODE
D[5:0]
Drives a Backplane Directly
Programmable Output Swing
100 mV to 1.6 V Differential
50 ⍀ On-Chip I/O Termination
User Controlled Voltage at the Load
Minimizes Power Dissipation
Dual Rank Latches
OUTPUT
LEVEL
LATCHES
RESET
CS
A[6:0]
RE
CONTROL
LOGIC
WE
Available in 256-Ball Grid Array
AD8152
UPDATE
APPLICATIONS
Fiber Optic Network Switching
High Speed Serial Backplane Routing to OC-48 with FEC
Gigabit Ethernet
VEE
Digital Video (HDTV)
Data Storage Networks
GENERAL DESCRIPTION
AD8152 is a member of the Xstream line of products and is a
breakthrough in digital switching, offering a large switch array
(34 × 34) on very little power, typically 2.0 W. Additionally, it
operates at data rates up to 3.2 Gbps per port, making it suitable
for Sonet/SDH OC-48 with Forward Error Correction (FEC).
The AD8152’s useful supply voltage range allows the user to
operate at LVPECL/CML data levels down to 2.5 V. The control
interface is LVTTL or LVCMOS compatible on 2.5 V to 3.3 V.
The AD8152’s fully differential signal path reduces jitter and
crosstalk while allowing the use of smaller single-ended voltage
swings. It is offered in a 256-ball SBGA package that operates
over the industrial temperature range of 0°C to 85°C.
80ps/DIV
Figure 1. Eye Pattern, 3.2 Gbps, PRBS 23
*Patent Pending
REV. A
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