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AD7680 PDF预览

AD7680

更新时间: 2024-10-27 21:55:31
品牌 Logo 应用领域
亚德诺 - ADI /
页数 文件大小 规格书
11页 200K
描述
3mW, 100kSPS,16-Bit ADC in 6 Lead SOT-23

AD7680 数据手册

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PRELIMINARY TECHNICAL DATA  
3mW, 100kSPS,  
a
16-Bit ADC in 6 Lead SOT-23  
AD7680  
Preliminary Technical Data  
FEATURES  
FUNCTIONAL BLOCK DIAGRAM  
Fast Throughput Rate: 100kSPS  
Specified for VDD of 2.5 V to 5.25 V  
Low Power:  
V
DD  
2.5mW typ at 100kSPS with 3V Supplies  
15mW typ at 100kSPS with 5V Supplies  
Wide Input Bandwidth:  
85dB SNR at 10kHz Input Frequency  
Flexible Power/Serial Clock Speed Management  
No Pipeline Delays  
16-BIT SUCCESSIVE  
APPROXIMATION  
ADC  
V
T/H  
IN  
High Speed Serial Interface  
AD7680  
SPI/QSPI/µWire/DSP Compatible  
Standby Mode: 0.5 µA max  
SCLK  
6-Lead SOT-23, and 8-Lead MSOP Packages  
CONTROL LOGIC  
SDATA  
APPLICATIONS  
CS  
Battery-Powered Systems  
Personal Digital Assistants  
Medical Instruments  
GND  
MobileCommunications  
Instrumentation and Control Systems  
Remote Data Acquisition Systems  
High-SpeedModems  
PRODUCT HIGHLIGHTS  
1. First 16-Bit ADC in a SOT-23 package.  
2. High Throughput with Low Power Consumption  
Optical Sensors  
3. Flexible Power/Serial Clock Speed Management  
The conversion rate is determined by the serial clock  
allowing the conversion time to be reduced through the  
serial clock speed increase. This allows the average power  
consumption to be reduced when a powerdown mode is  
used while not converting. The part also features a shut-  
down mode to maximize power efficiency at lower  
throughput rates. Power consumption is 0.5µA max  
when in shutdown.  
GENERAL DESCRIPTION  
The AD7680 is a 16-bit, fast, low power, successive-ap-  
proximation ADC. The part operates from a single 2.5 V  
to 5.25 V power supply and features throughput rates up  
to 100kSPS. The part contains a low-noise, wide band-  
width track/hold amplifier which can handle input fre-  
quencies in excess of 100kHz.  
4. Reference derived from the power supply.  
5. No Pipeline Delay  
The conversion process and data acquisition are controlled  
using CS and the serial clock, allowing the devices to  
interface with microprocessors or DSPs. The input signal  
is sampled on the falling edge of CS and the conversion is  
also initiated at this point. There are no pipelined delays  
associated with the part.  
The part features a standard successive-approximation  
ADC with accurate control of the sampling instant via a  
CS input and once off conversion control.  
The AD7860 uses advanced design techniques to achieve  
very low-power dissipation at fast throughput rates.  
The reference for the part is taken internally from VDD.  
This allows the widest dynamic input range to the ADC.  
Thus the analog input range for the part is 0 to VDD. The  
conversion rate is determined by the SCLK frequency.  
REV. PrE 11/02  
Information furnished by Analog Devices is believed to be accurate and  
reliable. However, no responsibility is assumed by Analog Devices for its  
use, nor for any infringements of patents or other rights of third parties  
which may result from its use. No license is granted by implication or  
otherwise under any patent or patent rights of Analog Devices.  
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.  
Tel: 781/329-4700  
Fax: 781/326-8703  
www.analog.com  
Analog Devices, Inc., 2002  

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