AD7466BRT-R

更新时间： 2024-09-15 08:16:59

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
28页	583K
描述
1.6 V, Micropower 12-/10-/8-Bit ADCs

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AD7466BRT-R 数据手册

1.6 V, Micropower 12-/10-/8-Bit ADCs

AD7466/AD7467/AD7468

FEATURES

FUNCTIONAL BLOCK DIAGRAM

Specified for V_DDof 1.6 V to 3.6 V

Low power:

0.62 mW typical at 100 kSPS with 3 V supplies

0.48 mW typical at 50 kSPS with 3.6 V supplies

0.12 mW typical at 100 kSPS with 1.6 V supplies

Fast throughput rate: 200 kSPS

Wide input bandwidth:

71 dB SNR at 30 kHz input frequency

Flexible power/serial clock speed management

No pipeline delays

12-/10-/8-BIT

SUCCESSIVE

APPROXIMATION

ADC

T/H

SCLK

SDATA

CONTROL

LOGIC

High speed serial interface:

AD7466/AD7467/AD7468

SPI/QSPI™/MICROWIRE™/DSP compatible

Automatic power-down

GND

Power-down mode: 8 nA typical

6-lead SOT-23 package

Figure 1.

8-lead MSOP package

APPLICATIONS

Battery-powered systems

Medical instruments

Remote data acquisition

Isolated data acquisition

GENERAL DESCRIPTION

PRODUCT HIGHLIGHTS

The AD7466/AD7467/AD7468¹are 12-/10-/8-bit, high speed,

low power, successive approximation analog-to-digital

converters (ADCs), respectively. The parts operate from a single

1.6 V to 3.6 V power supply and feature throughput rates up to

200 kSPS with low power dissipation. The parts contain a low

noise, wide bandwidth track-and-hold amplifier, which can

handle input frequencies in excess of 3 MHz.

1. Specified for supply voltages of 1.6 V to 3.6 V.

2. 12-, 10-, and 8-bit ADCs in SOT-23 and MSOP packages.

3. High throughput rate with low power consumption.

Power consumption in normal mode of operation at

100 kSPS and 3 V is 0.9 mW maximum.

4. Flexible power/serial clock speed management.

The conversion rate is determined by the serial clock,

allowing the conversion time to be reduced through

increases in the serial clock speed. Automatic power-down

after conversion allows the average power consumption to

be reduced when in power-down. Current consumption is

0.1 μA maximum and 8 nA typically when in power-down.

The conversion process and data acquisition are controlled

using

and the serial clock, allowing the devices to interface

with microprocessors or DSPs. The input signal is sampled on

the falling edge of , and the conversion is also initiated at this

point. There are no pipeline delays associated with the part.

The reference for the part is taken internally from V_DD. This

allows the widest dynamic input range to the ADC. Thus, the

analog input range for the part is 0 V to V_DD. The conversion

rate is determined by the SCLK.

5. Reference derived from the power supply.

6. No pipeline delay.

7. The part features a standard successive approximation

ADC with accurate control of conversions via a

input.

¹Protected by U.S. Patent No. 6,681,332.

Rev. C

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registeredtrademarks arethe property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700 www.analog.com

12 3 4 5 6 7...28

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与AD7466BRT-R相关器件

型号	品牌	获取价格	描述	数据表
AD7466BRT-REEL	ADI	获取价格	暂无描述
AD7466BRT-REEL7	ADI	获取价格	1.6 V, Micropower 12-/10-/8-Bit ADCs
AD7466BRTZ	ADI	获取价格	1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL ACCESS, PDSO6
AD7466BRTZ-R	ADI	获取价格	1.6 V, Micropower 12-/10-/8-Bit ADCs
AD7466BRTZ-R2	ADI	获取价格	1.6 V Micro-Power 12-Bit ADC
AD7466BRTZ-REEL	ADI	获取价格	1.6 V, Micropower 12-/10-/8-Bit ADCs
AD7466BRTZ-REEL7	ADI	获取价格	1.6 V, Micropower 12-/10-/8-Bit ADCs
AD7466-KGD-DF	ADI	获取价格	1.6 V Micro-Power 12-Bit ADC
AD7467	ADI	获取价格	1.8 V, Micro-Power, 8/10/12-Bit ADCs in 6 Lead SOT-23
AD7467_15	ADI	获取价格	1.6 V, Micropower 12-/10-/8-Bit ADCs

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