PRELIMINARY TECHNICAL DATA
Pseudo Differential, 1MSPS,
a
PreliminaryTechnicalData
12- & 10-Bit ADCs in 8-lead SOT-23
AD7451/AD7441
FEATURES
FUNCTIONAL BLOCK DIAGRAM
Fast Throughput Rate: 1MSPS
Specified for VDD of 2.7 V to 5.25 V
Low Power at max Throughput Rate:
3.75 mW typ at 1MSPS with VDD = 3 V
9 mW typ at 1MSPS with VDD = 5 V
Pseudo Differential Analog Input
Wide Input Bandwidth:
V
DD
V
12-BIT SUCCESSIVE
APPROXIMATION
ADC
IN+
T/H
70dB SINAD at 300kHz Input Frequency
Flexible Power/Serial Clock Speed Management
No Pipeline Delays
V
IN-
V
REF
High Speed Serial Interface - SPITM/QSPITM
MICROWIRETM/ DSP Compatible
Power-Down Mode: 1µA max
/
SCLK
SDATA
CS
8 Pin SOT-23 and µSOIC Packages
CONTROL
LOGIC
AD7451/
AD7441
APPLICATIONS
Transducer Interface
BatteryPoweredSystems
DataAcquisitionSystems
PortableInstrumentation
Motor Control
Communications
GND
GENERAL DESCRIPTION
The AD7451/41 use advanced design techniques to achieve
very low power dissipation at high throughput rates.
The AD7451/AD7441 are respectively 12- and 10-bit,
high speed, low power, successive-approximation (SAR)
analog-to-digital converters that feature a pseudo differen-
tial analog input. These parts operate from a single 2.7 V
to 5.25 V power supply and feature throughput rates up to
1MSPS.
PRODUCT HIGHLIGHTS
1.Operation with 2.7 V to 5.25 V power supplies.
2.High Throughput with Low Power Consumption.
With a 3V supply, the AD7451/41 offer 3.75mW typ
power consumption for 1MSPS throughput.
3.Pseudo Differential Analog Input.
The VIN- input can be used as an offset from ground
4.Flexible Power/Serial Clock Speed Management.
The conversion rate is determined by the serial clock,
allowing the power to be reduced as the conversion time
is reduced through the serial clock speed increase. These
parts also feature a shutdown mode to maximize power
efficiency at lower throughput rates.
The parts contains a low-noise, wide bandwidth, differen-
tial track and hold amplifier (T/H) which can handle
input frequencies in excess of 1MHz with the -3dB point
being 20MHz typically. The reference voltage is 2.5 V
and is applied externally to the VREF pin.
The conversion process and data acquisition are controlled
using CS and the serial clock allowing the device to inter-
face with Microprocessors or DSPs. The input signals are
sampled on the falling edge of CS and the conversion is
also initiated at this point.
5.No Pipeline Delay.
6.Accurate control of the sampling instant via a CS input
and once off conversion control.
The SAR architecture of these parts ensures that there are
no pipeline delays.
MICROWIRE is a trademark of National Semiconductor Corporation.
SPI and QSPI are trademarks of Motorola, Inc.
REV. PrC 24/05/02
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reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
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© Analog Devices, Inc., 2002